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If all sources of a PHI node are defined by an implicit_def, just emit an implicit_def instead of a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50927 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -127,11 +127,15 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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return true;
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return true;
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}
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}
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static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi, unsigned SrcIdx,
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static bool isSourceDefinedByImplicitDef(MachineInstr *MPhi,
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MachineRegisterInfo *MRI) {
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MachineRegisterInfo *MRI) {
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unsigned SrcReg = MPhi->getOperand(SrcIdx*2+1).getReg();
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for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
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MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
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unsigned SrcReg = MPhi->getOperand(i).getReg();
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return DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF;
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MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
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if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
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return false;
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}
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return true;
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}
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}
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/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
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/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
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@ -156,9 +160,9 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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// into the phi node destination.
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// into the phi node destination.
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//
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//
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const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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if (NumSrcs == 1 && isSourceDefinedByImplicitDef(MPhi, 0, MRI))
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if (isSourceDefinedByImplicitDef(MPhi, MRI))
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// If the only source of a PHI node is an implicit_def, just emit an
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// If all sources of a PHI node are implicit_def, just emit an implicit_def
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// implicit_def instead of a copy.
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// instead of a copy.
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BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
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BuildMI(MBB, AfterPHIsIt, TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
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else
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else
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TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
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TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
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25
test/CodeGen/X86/2008-05-09-PHIElimBug.ll
Normal file
25
test/CodeGen/X86/2008-05-09-PHIElimBug.ll
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@ -0,0 +1,25 @@
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; RUN: llvm-as < %s | llc -march=x86
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%struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
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define fastcc void @t() nounwind {
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entry:
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br i1 false, label %bb23816.preheader, label %bb23821
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bb23816.preheader: ; preds = %entry
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%tmp23735 = and i32 0, 2 ; <i32> [#uses=0]
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br label %bb23830
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bb23821: ; preds = %entry
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br i1 false, label %bb23830, label %bb23827
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bb23827: ; preds = %bb23821
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%tmp23829 = getelementptr %struct.V* null, i32 0, i32 42 ; <i32*> [#uses=0]
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br label %bb23830
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bb23830: ; preds = %bb23827, %bb23821, %bb23816.preheader
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%scaledInDst.2.reg2mem.5 = phi i8 [ undef, %bb23827 ], [ undef, %bb23821 ], [ undef, %bb23816.preheader ] ; <i8> [#uses=1]
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%toBool35047 = icmp eq i8 %scaledInDst.2.reg2mem.5, 0 ; <i1> [#uses=1]
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%bothcond39107 = or i1 %toBool35047, false ; <i1> [#uses=0]
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unreachable
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}
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