Fixed disassembler for vstm/vldm ARM VFP instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Silviu Baranga 2012-05-03 16:38:40 +00:00
parent 309076ff76
commit b422d0b65e
2 changed files with 33 additions and 4 deletions

View File

@ -1224,8 +1224,8 @@ static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
DecodeStatus S = MCDisassembler::Success;
unsigned Vd = fieldFromInstruction32(Val, 8, 4);
unsigned regs = Val & 0xFF;
unsigned Vd = fieldFromInstruction32(Val, 8, 5);
unsigned regs = fieldFromInstruction32(Val, 0, 8);
if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))
return MCDisassembler::Fail;
@ -1241,8 +1241,10 @@ static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
DecodeStatus S = MCDisassembler::Success;
unsigned Vd = fieldFromInstruction32(Val, 8, 4);
unsigned regs = (Val & 0xFF) / 2;
unsigned Vd = fieldFromInstruction32(Val, 8, 5);
unsigned regs = fieldFromInstruction32(Val, 0, 8);
regs = regs >> 1;
if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))
return MCDisassembler::Fail;

View File

@ -203,6 +203,33 @@
# CHECK: vstmia r1, {d2, d3, d4, d5, d6, d7}
# CHECK: vstmia r1, {s2, s3, s4, s5, s6, s7}
0x05 0x9a 0xc0 0x0c
0x0c 0x0b 0xc7 0x0c
0x06 0x9a 0x93 0x0c
0x0a 0x5b 0xd2 0x0c
# CHECK: vstmiaeq r0, {s19, s20, s21, s22, s23}
# CHECK: vstmiaeq r7, {d16, d17, d18, d19, d20, d21}
# CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}
# CHECK: vldmiaeq r2, {d21, d22, d23, d24, d25}
0x04 0xca 0x6c 0x0d
0x06 0x1b 0x69 0x0d
0x03 0xaa 0x75 0x0d
0x08 0xeb 0x37 0x0d
# CHECK: vstmdbeq r12!, {s25, s26, s27, s28}
# CHECK: vstmdbeq r9!, {d17, d18, d19}
# CHECK: vldmdbeq r5!, {s21, s22, s23}
# CHECK: vldmdbeq r7!, {d14, d15, d16, d17}
0x04 0x7a 0xa6 0x0c
0x0c 0xfb 0xa4 0x0c
0x03 0xaa 0xf8 0x0c
0x0a 0x3b 0xfb 0x0c
# CHECK: vstmiaeq r6!, {s14, s15, s16, s17}
# CHECK: vstmiaeq r4!, {d15, d16, d17, d18, d19, d20}
# CHECK: vldmiaeq r8!, {s21, s22, s23}
# CHECK: vldmiaeq r11!, {d19, d20, d21, d22, d23}
0x40 0x0b 0xbd 0xee
0x60 0x0a 0xbd 0xee
0x40 0x0b 0xbc 0xee