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Fixed disassembler for vstm/vldm ARM VFP instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Silviu Baranga
2012-05-03 16:38:40 +00:00
parent 309076ff76
commit b422d0b65e
2 changed files with 33 additions and 4 deletions
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10
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -1224,8 +1224,8 @@ static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
DecodeStatus S = MCDisassembler::Success;
unsigned Vd = fieldFromInstruction32(Val, 8, 4);
unsigned regs = Val & 0xFF;
unsigned Vd = fieldFromInstruction32(Val, 8, 5);
unsigned regs = fieldFromInstruction32(Val, 0, 8);
if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))
return MCDisassembler::Fail;
@ -1241,8 +1241,10 @@ static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
DecodeStatus S = MCDisassembler::Success;
unsigned Vd = fieldFromInstruction32(Val, 8, 4);
unsigned regs = (Val & 0xFF) / 2;
unsigned Vd = fieldFromInstruction32(Val, 8, 5);
unsigned regs = fieldFromInstruction32(Val, 0, 8);
regs = regs >> 1;
if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))
return MCDisassembler::Fail;