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InstCombine: Modernize a bunch of cast combines.

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Also make them vector-aware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199608 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2014-01-19 20:05:13 +00:00
parent 2b03d0051f
commit b45edea9b3
3 changed files with 79 additions and 43 deletions
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65
lib/Transforms/InstCombine/InstCombineCasts.cpp
View File

@ -858,37 +858,27 @@ Instruction *InstCombiner::visitZExt(ZExtInst &CI) {
}
}
// zext(trunc(t) & C) -> (t & zext(C)).
if (SrcI && SrcI->getOpcode() == Instruction::And && SrcI->hasOneUse())
if (ConstantInt *C = dyn_cast<ConstantInt>(SrcI->getOperand(1)))
if (TruncInst *TI = dyn_cast<TruncInst>(SrcI->getOperand(0))) {
Value *TI0 = TI->getOperand(0);
if (TI0->getType() == CI.getType())
return
BinaryOperator::CreateAnd(TI0,
ConstantExpr::getZExt(C, CI.getType()));
}
// zext(trunc(X) & C) -> (X & zext(C)).
Constant *C;
Value *X;
if (SrcI &&
match(SrcI, m_OneUse(m_And(m_Trunc(m_Value(X)), m_Constant(C)))) &&
X->getType() == CI.getType())
return BinaryOperator::CreateAnd(X, ConstantExpr::getZExt(C, CI.getType()));
// zext((trunc(t) & C) ^ C) -> ((t & zext(C)) ^ zext(C)).
if (SrcI && SrcI->getOpcode() == Instruction::Xor && SrcI->hasOneUse())
if (ConstantInt *C = dyn_cast<ConstantInt>(SrcI->getOperand(1)))
if (BinaryOperator *And = dyn_cast<BinaryOperator>(SrcI->getOperand(0)))
if (And->getOpcode() == Instruction::And && And->hasOneUse() &&
And->getOperand(1) == C)
if (TruncInst *TI = dyn_cast<TruncInst>(And->getOperand(0))) {
Value *TI0 = TI->getOperand(0);
if (TI0->getType() == CI.getType()) {
Constant *ZC = ConstantExpr::getZExt(C, CI.getType());
Value *NewAnd = Builder->CreateAnd(TI0, ZC);
return BinaryOperator::CreateXor(NewAnd, ZC);
}
}
// zext((trunc(X) & C) ^ C) -> ((X & zext(C)) ^ zext(C)).
Value *And;
if (SrcI && match(SrcI, m_OneUse(m_Xor(m_Value(And), m_Constant(C)))) &&
match(And, m_OneUse(m_And(m_Trunc(m_Value(X)), m_Specific(C)))) &&
X->getType() == CI.getType()) {
Constant *ZC = ConstantExpr::getZExt(C, CI.getType());
return BinaryOperator::CreateXor(Builder->CreateAnd(X, ZC), ZC);
}
// zext (xor i1 X, true) to i32 --> xor (zext i1 X to i32), 1
Value *X;
if (SrcI && SrcI->hasOneUse() && SrcI->getType()->isIntegerTy(1) &&
match(SrcI, m_Not(m_Value(X))) &&
(!X->hasOneUse() || !isa<CmpInst>(X))) {
if (SrcI && SrcI->hasOneUse() &&
SrcI->getType()->getScalarType()->isIntegerTy(1) &&
match(SrcI, m_Not(m_Value(X))) && (!X->hasOneUse() || !isa<CmpInst>(X))) {
Value *New = Builder->CreateZExt(X, CI.getType());
return BinaryOperator::CreateXor(New, ConstantInt::get(CI.getType(), 1));
}
@ -902,10 +892,10 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
Value *Op0 = ICI->getOperand(0), *Op1 = ICI->getOperand(1);
ICmpInst::Predicate Pred = ICI->getPredicate();
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
if (Constant *Op1C = dyn_cast<Constant>(Op1)) {
// (x <s 0) ? -1 : 0 -> ashr x, 31 -> all ones if negative
// (x >s -1) ? -1 : 0 -> not (ashr x, 31) -> all ones if positive
if ((Pred == ICmpInst::ICMP_SLT && Op1C->isZero()) ||
if ((Pred == ICmpInst::ICMP_SLT && Op1C->isNullValue()) ||
(Pred == ICmpInst::ICMP_SGT && Op1C->isAllOnesValue())) {
Value *Sh = ConstantInt::get(Op0->getType(),
@ -918,7 +908,9 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
In = Builder->CreateNot(In, In->getName()+".not");
return ReplaceInstUsesWith(CI, In);
}
}
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
// If we know that only one bit of the LHS of the icmp can be set and we
// have an equality comparison with zero or a power of 2, we can transform
// the icmp and sext into bitwise/integer operations.
@ -975,19 +967,6 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
}
}
// vector (x <s 0) ? -1 : 0 -> ashr x, 31 -> all ones if signed.
if (VectorType *VTy = dyn_cast<VectorType>(CI.getType())) {
if (Pred == ICmpInst::ICMP_SLT && match(Op1, m_Zero()) &&
Op0->getType() == CI.getType()) {
Type *EltTy = VTy->getElementType();
// splat the shift constant to a constant vector.
Constant *VSh = ConstantInt::get(VTy, EltTy->getScalarSizeInBits()-1);
Value *In = Builder->CreateAShr(Op0, VSh, Op0->getName()+".lobit");
return ReplaceInstUsesWith(CI, In);
}
}
return 0;
}

23
test/Transforms/InstCombine/vec_sext.ll
View File

@ -13,6 +13,7 @@ entry:
%cond = or <4 x i32> %2, %3
ret <4 x i32> %cond
; CHECK-LABEL: @psignd_3
; CHECK: ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
; CHECK: sub nsw <4 x i32> zeroinitializer, %a
; CHECK: xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
@ -20,3 +21,25 @@ entry:
; CHECK: and <4 x i32> %b.lobit, %sub
; CHECK: or <4 x i32> %1, %2
}
define <4 x i32> @test1(<4 x i32> %a, <4 x i32> %b) nounwind ssp {
entry:
%cmp = icmp sgt <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
%sext = sext <4 x i1> %cmp to <4 x i32>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%0 = icmp slt <4 x i32> %sext, zeroinitializer
%sext3 = sext <4 x i1> %0 to <4 x i32>
%1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
%2 = and <4 x i32> %a, %1
%3 = and <4 x i32> %sext3, %sub
%cond = or <4 x i32> %2, %3
ret <4 x i32> %cond
; CHECK-LABEL: @test1
; CHECK: ashr <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
; CHECK: xor <4 x i32> %b.lobit, <i32 -1, i32 -1, i32 -1, i32 -1>
; CHECK: sub nsw <4 x i32> zeroinitializer, %a
; CHECK: and <4 x i32> %b.lobit, %a
; CHECK: and <4 x i32> %b.lobit.not, %sub
; CHECK: or <4 x i32> %0, %1
}

34
test/Transforms/InstCombine/zext.ll
View File

@ -5,7 +5,41 @@ define i64 @test_sext_zext(i16 %A) {
%c1 = zext i16 %A to i32 ; <i32> [#uses=1]
%c2 = sext i32 %c1 to i64 ; <i64> [#uses=1]
ret i64 %c2
; CHECK-LABEL: @test_sext_zext
; CHECK-NOT: %c1
; CHECK: %c2 = zext i16 %A to i64
; CHECK: ret i64 %c2
}
define <2 x i64> @test2(<2 x i1> %A) {
%xor = xor <2 x i1> %A, <i1 true, i1 true>
%zext = zext <2 x i1> %xor to <2 x i64>
ret <2 x i64> %zext
; CHECK-LABEL: @test2
; CHECK-NEXT: zext <2 x i1> %A to <2 x i64>
; CHECK-NEXT: xor <2 x i64> %1, <i64 1, i64 1>
}
define <2 x i64> @test3(<2 x i64> %A) {
%trunc = trunc <2 x i64> %A to <2 x i32>
%and = and <2 x i32> %trunc, <i32 23, i32 42>
%zext = zext <2 x i32> %and to <2 x i64>
ret <2 x i64> %zext
; CHECK-LABEL: @test3
; CHECK-NEXT: and <2 x i64> %A, <i64 23, i64 42>
}
define <2 x i64> @test4(<2 x i64> %A) {
%trunc = trunc <2 x i64> %A to <2 x i32>
%and = and <2 x i32> %trunc, <i32 23, i32 42>
%xor = xor <2 x i32> %and, <i32 23, i32 42>
%zext = zext <2 x i32> %xor to <2 x i64>
ret <2 x i64> %zext
; CHECK-LABEL: @test4
; CHECK-NEXT: xor <2 x i64> %A, <i64 4294967295, i64 4294967295>
; CHECK-NEXT: and <2 x i64> %1, <i64 23, i64 42>
}