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Propagate alignment/volatility in two places.
Implement support for expanding a bitcast from an illegal vector type to a legal one (e.g. 4xi32 -> 4xf32 in SSE1). This fixes PR1371 and CodeGen/X86/2007-05-05-VecCastExpand.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36787 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1881,7 +1881,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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}
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Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(), ST->isVolatile(),
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ST->getAlignment());
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if (Hi.Val == NULL) {
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// Must be int <-> float one-to-one expansion.
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@ -1896,7 +1897,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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// FIXME: This sets the srcvalue of both halves to be the same, which is
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// wrong.
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Hi = DAG.getStore(Tmp1, Hi, Tmp2, ST->getSrcValue(),
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ST->getSrcValueOffset());
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ST->getSrcValueOffset(), ST->isVolatile(),
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std::min(ST->getAlignment(), IncrementSize));
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Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
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break;
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}
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@ -5667,8 +5669,18 @@ SDOperand SelectionDAGLegalize::PackVectorOp(SDOperand Op,
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PackVectorOp(Node->getOperand(0), EVT));
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break;
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} else {
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// FIXME: UNIMP!
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assert(0 && "Cast from unsupported vector type not implemented yet!");
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// If the input vector type isn't legal, then go through memory.
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SDOperand Ptr = CreateStackTemporary(NewVT);
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// Get the alignment for the store.
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const TargetData &TD = *TLI.getTargetData();
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unsigned Align =
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TD.getABITypeAlignment(MVT::getTypeForValueType(NewVT));
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SDOperand St = DAG.getStore(DAG.getEntryNode(),
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Node->getOperand(0), Ptr, NULL, 0, false,
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Align);
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Result = DAG.getLoad(NewVT, St, Ptr, 0, 0);
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break;
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}
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}
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break;
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