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[PowerPC] Implement atomic NAND operations as actual NAND
This changes the implementation of atomic NAND operations from "a & ~b" (compatible with GCC < 4.4) to actual "~(a & b)" (compatible with GCC >= 4.4). This is in line with the common-code and ARM back-end change implemented in r212433. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212547 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6833,13 +6833,13 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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BB = EmitAtomicBinary(MI, BB, true, PPC::XOR8);
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else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I8)
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BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::ANDC);
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BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::NAND);
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else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I16)
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BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::ANDC);
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BB = EmitPartwordAtomicBinary(MI, BB, false, PPC::NAND);
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else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I32)
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BB = EmitAtomicBinary(MI, BB, false, PPC::ANDC);
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BB = EmitAtomicBinary(MI, BB, false, PPC::NAND);
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else if (MI->getOpcode() == PPC::ATOMIC_LOAD_NAND_I64)
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BB = EmitAtomicBinary(MI, BB, true, PPC::ANDC8);
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BB = EmitAtomicBinary(MI, BB, true, PPC::NAND8);
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else if (MI->getOpcode() == PPC::ATOMIC_LOAD_SUB_I8)
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BB = EmitPartwordAtomicBinary(MI, BB, true, PPC::SUBF);
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