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Improve codegen for BUILD_VECTORs on ARM.

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If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163304 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
James Molloy
2012-09-06 09:55:02 +00:00
parent 486270aee6
commit ba8562af44
2 changed files with 90 additions and 10 deletions
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test/CodeGen/ARM/vdup.ll
+34
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@@ -261,3 +261,37 @@ define void @redundantVdup(<8 x i8>* %ptr) nounwind {
store <8 x i8> %2, <8 x i8>* %ptr, align 8
ret void
}
define <4 x i32> @tdupi(i32 %x, i32 %y) {
;CHECK: tdupi
;CHECK: vdup.32
%1 = insertelement <4 x i32> undef, i32 %x, i32 0
%2 = insertelement <4 x i32> %1, i32 %x, i32 1
%3 = insertelement <4 x i32> %2, i32 %x, i32 2
%4 = insertelement <4 x i32> %3, i32 %y, i32 3
ret <4 x i32> %4
}
define <4 x float> @tdupf(float %x, float %y) {
;CHECK: tdupf
;CHECK: vdup.32
%1 = insertelement <4 x float> undef, float %x, i32 0
%2 = insertelement <4 x float> %1, float %x, i32 1
%3 = insertelement <4 x float> %2, float %x, i32 2
%4 = insertelement <4 x float> %3, float %y, i32 3
ret <4 x float> %4
}
; This test checks that when splatting an element from a vector into another,
; the value isn't moved out to GPRs first.
define <4 x i32> @tduplane(<4 x i32> %invec) {
;CHECK: tduplane
;CHECK-NOT: vmov {{.*}}, d16[1]
;CHECK: vdup.32 {{.*}}, d16[1]
%in = extractelement <4 x i32> %invec, i32 1
%1 = insertelement <4 x i32> undef, i32 %in, i32 0
%2 = insertelement <4 x i32> %1, i32 %in, i32 1
%3 = insertelement <4 x i32> %2, i32 %in, i32 2
%4 = insertelement <4 x i32> %3, i32 255, i32 3
ret <4 x i32> %4
}