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fix assembly syntax

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2006-10-16 17:38:12 +00:00
parent 82c678b83c
commit bb1e2fbc68
1 changed files with 4 additions and 4 deletions
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8
lib/Target/ARM/ARMInstrInfo.td
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@ -114,19 +114,19 @@ def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
[(set IntRegs:$dst, (load iaddr:$addr))]>;
def LDRB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
"ldrb $dst, $addr",
"ldrb $dst, [$addr]",
[(set IntRegs:$dst, (zextloadi8 IntRegs:$addr))]>;
def LDRSB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
"ldrsb $dst, $addr",
"ldrsb $dst, [$addr]",
[(set IntRegs:$dst, (sextloadi8 IntRegs:$addr))]>;
def LDRH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
"ldrh $dst, $addr",
"ldrh $dst, [$addr]",
[(set IntRegs:$dst, (zextloadi16 IntRegs:$addr))]>;
def LDRSH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
"ldrsh $dst, $addr",
"ldrsh $dst, [$addr]",
[(set IntRegs:$dst, (sextloadi16 IntRegs:$addr))]>;
def str : InstARM<(ops IntRegs:$src, memri:$addr),