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Fixes related to coding style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131922 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -36,25 +36,25 @@ using namespace llvm;
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const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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case MipsISD::JmpLink : return "MipsISD::JmpLink";
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case MipsISD::Hi : return "MipsISD::Hi";
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case MipsISD::Lo : return "MipsISD::Lo";
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case MipsISD::GPRel : return "MipsISD::GPRel";
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case MipsISD::Ret : return "MipsISD::Ret";
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case MipsISD::FPBrcond : return "MipsISD::FPBrcond";
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case MipsISD::FPCmp : return "MipsISD::FPCmp";
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case MipsISD::CMovFP_T : return "MipsISD::CMovFP_T";
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case MipsISD::CMovFP_F : return "MipsISD::CMovFP_F";
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case MipsISD::FPRound : return "MipsISD::FPRound";
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case MipsISD::MAdd : return "MipsISD::MAdd";
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case MipsISD::MAddu : return "MipsISD::MAddu";
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case MipsISD::MSub : return "MipsISD::MSub";
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case MipsISD::MSubu : return "MipsISD::MSubu";
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case MipsISD::DivRem : return "MipsISD::DivRem";
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case MipsISD::DivRemU : return "MipsISD::DivRemU";
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case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64";
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case MipsISD::ExtractElementF64: return "MipsISD::ExtractElementF64";
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default : return NULL;
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case MipsISD::JmpLink: return "MipsISD::JmpLink";
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case MipsISD::Hi: return "MipsISD::Hi";
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case MipsISD::Lo: return "MipsISD::Lo";
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case MipsISD::GPRel: return "MipsISD::GPRel";
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case MipsISD::Ret: return "MipsISD::Ret";
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case MipsISD::FPBrcond: return "MipsISD::FPBrcond";
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case MipsISD::FPCmp: return "MipsISD::FPCmp";
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case MipsISD::CMovFP_T: return "MipsISD::CMovFP_T";
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case MipsISD::CMovFP_F: return "MipsISD::CMovFP_F";
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case MipsISD::FPRound: return "MipsISD::FPRound";
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case MipsISD::MAdd: return "MipsISD::MAdd";
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case MipsISD::MAddu: return "MipsISD::MAddu";
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case MipsISD::MSub: return "MipsISD::MSub";
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case MipsISD::MSubu: return "MipsISD::MSubu";
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case MipsISD::DivRem: return "MipsISD::DivRem";
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case MipsISD::DivRemU: return "MipsISD::DivRemU";
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case MipsISD::BuildPairF64: return "MipsISD::BuildPairF64";
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case MipsISD::ExtractElementF64: return "MipsISD::ExtractElementF64";
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default: return NULL;
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}
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}
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@ -380,7 +380,7 @@ static SDValue PerformDivRemCombine(SDNode *N, SelectionDAG& DAG,
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// insert MFHI
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if (N->hasAnyUseOfValue(1)) {
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SDValue CopyFromHi = DAG.getCopyFromReg(InChain, dl,
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Mips::HI, MVT::i32, InGlue);
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Mips::HI, MVT::i32, InGlue);
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DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), CopyFromHi);
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}
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@ -1051,9 +1051,9 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(), ArgLocs,
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*DAG.getContext());
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if (Subtarget->isABI_O32()) {
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if (Subtarget->isABI_O32())
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CCInfo.AnalyzeCallOperands(Outs, CC_MipsO32);
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} else
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else
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CCInfo.AnalyzeCallOperands(Outs, CC_Mips);
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// Get a count of how many bytes are to be pushed on the stack.
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@ -1232,20 +1232,20 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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// location is used on function prologue to save GP and also after all
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// emitted CALL's to restore GP.
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if (IsPIC) {
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// Function can have an arbitrary number of calls, so
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// hold the LastArgStackLoc with the biggest offset.
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int MaxCallFrameSize = MipsFI->getMaxCallFrameSize();
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// Function can have an arbitrary number of calls, so
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// hold the LastArgStackLoc with the biggest offset.
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int MaxCallFrameSize = MipsFI->getMaxCallFrameSize();
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if (MaxCallFrameSize < (int)NextStackOffset) {
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MipsFI->setMaxCallFrameSize(NextStackOffset);
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if (MaxCallFrameSize < (int)NextStackOffset) {
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MipsFI->setMaxCallFrameSize(NextStackOffset);
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// $gp restore slot must be aligned.
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unsigned StackAlignment = TFL->getStackAlignment();
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NextStackOffset = (NextStackOffset + StackAlignment - 1) /
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StackAlignment * StackAlignment;
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int GPFI = MipsFI->getGPFI();
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MFI->setObjectOffset(GPFI, NextStackOffset);
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}
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// $gp restore slot must be aligned.
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unsigned StackAlignment = TFL->getStackAlignment();
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NextStackOffset = (NextStackOffset + StackAlignment - 1) /
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StackAlignment * StackAlignment;
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int GPFI = MipsFI->getGPFI();
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MFI->setObjectOffset(GPFI, NextStackOffset);
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}
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}
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// Extend range of indices of frame objects for outgoing arguments that were
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