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ARM ldm/stm register lists can be out of order.
It's not a good style idea, as the registers will be laid down in memory in numerical order, not the order they're in the list, but it's legal. vldm/vstm are stricter. rdar://11064740 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152943 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2854,8 +2854,12 @@ parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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if (!RC->contains(Reg))
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if (!RC->contains(Reg))
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return Error(RegLoc, "invalid register in register list");
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return Error(RegLoc, "invalid register in register list");
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// List must be monotonically increasing.
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// List must be monotonically increasing.
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if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg))
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if (getARMRegisterNumbering(Reg) < getARMRegisterNumbering(OldReg)) {
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if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg))
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Warning(RegLoc, "register list not in ascending order");
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else
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return Error(RegLoc, "register list not in ascending order");
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return Error(RegLoc, "register list not in ascending order");
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}
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if (getARMRegisterNumbering(Reg) == getARMRegisterNumbering(OldReg)) {
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if (getARMRegisterNumbering(Reg) == getARMRegisterNumbering(OldReg)) {
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Warning(RegLoc, "duplicated register (" + RegTok.getString() +
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Warning(RegLoc, "duplicated register (" + RegTok.getString() +
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") in register list");
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") in register list");
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@ -216,7 +216,7 @@
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@ Out of order STM registers
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@ Out of order STM registers
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stmda sp!, {r5, r2}
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stmda sp!, {r5, r2}
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@ CHECK-ERRORS: error: register list not in ascending order
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@ CHECK-ERRORS: warning: register list not in ascending order
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@ CHECK-ERRORS: stmda sp!, {r5, r2}
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@ CHECK-ERRORS: stmda sp!, {r5, r2}
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@ CHECK-ERRORS: ^
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@ CHECK-ERRORS: ^
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