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Add a subtarget feature for the stfiwx instruction. I know the G5 has it,
but I don't know what other PPC impls do. If someone could update the proc table, I would appreciate it :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26421 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -29,6 +29,8 @@ def FeatureGPUL : SubtargetFeature<"gpul","IsGigaProcessor", "true",
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"Enable GPUL instructions">;
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"Enable GPUL instructions">;
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def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true",
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def FeatureFSqrt : SubtargetFeature<"fsqrt","HasFSQRT", "true",
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"Enable the fsqrt instruction">;
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"Enable the fsqrt instruction">;
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def FeatureSTFIWX : SubtargetFeature<"stfiwx","HasSTFIWX", "true",
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"Enable the stfiwx instruction">;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Register File Description
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// Register File Description
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@@ -58,10 +60,10 @@ def : Processor<"7450", G4PlusItineraries, [FeatureAltivec]>;
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def : Processor<"g4+", G4PlusItineraries, [FeatureAltivec]>;
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def : Processor<"g4+", G4PlusItineraries, [FeatureAltivec]>;
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def : Processor<"750", G3Itineraries, []>;
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def : Processor<"750", G3Itineraries, []>;
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def : Processor<"970", G5Itineraries,
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def : Processor<"970", G5Itineraries,
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[FeatureAltivec, FeatureGPUL, FeatureFSqrt,
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[FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
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Feature64Bit /*, Feature64BitRegs */]>;
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Feature64Bit /*, Feature64BitRegs */]>;
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def : Processor<"g5", G5Itineraries,
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def : Processor<"g5", G5Itineraries,
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[FeatureAltivec, FeatureGPUL, FeatureFSqrt,
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[FeatureAltivec, FeatureGPUL, FeatureFSqrt, FeatureSTFIWX,
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Feature64Bit /*, Feature64BitRegs */]>;
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Feature64Bit /*, Feature64BitRegs */]>;
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@@ -37,6 +37,7 @@ protected:
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bool Has64BitRegs;
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bool Has64BitRegs;
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bool HasAltivec;
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bool HasAltivec;
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bool HasFSQRT;
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bool HasFSQRT;
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bool HasSTFIWX;
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bool IsAIX;
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bool IsAIX;
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bool IsDarwin;
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bool IsDarwin;
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public:
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public:
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@@ -60,6 +61,7 @@ public:
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bool hasFSQRT() const { return HasFSQRT; }
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bool hasFSQRT() const { return HasFSQRT; }
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bool hasSTFIWX() const { return HasSTFIWX; }
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bool has64BitRegs() const { return Has64BitRegs; }
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bool has64BitRegs() const { return Has64BitRegs; }
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bool hasAltivec() const { return HasAltivec; }
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bool hasAltivec() const { return HasAltivec; }
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