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Integrate Assembler: Support X86_64_DTPOFF64 relocations

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185131 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Blaikie 2013-06-28 04:24:32 +00:00
parent 8e7294f995
commit c084c0945b
2 changed files with 14 additions and 2 deletions
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13
lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
View File

@ -101,7 +101,18 @@ unsigned X86ELFObjectWriter::GetRelocType(const MCValue &Target,
} else {
switch ((unsigned)Fixup.getKind()) {
default: llvm_unreachable("invalid fixup kind!");
case FK_Data_8: Type = ELF::R_X86_64_64; break;
case FK_Data_8:
switch (Modifier) {
default:
llvm_unreachable("Unimplemented");
case MCSymbolRefExpr::VK_None:
Type = ELF::R_X86_64_64;
break;
case MCSymbolRefExpr::VK_DTPOFF:
Type = ELF::R_X86_64_DTPOFF64;
break;
}
break;
case X86::reloc_signed_4byte:
switch (Modifier) {
default:

3
test/MC/ELF/relocation.s
View File

@ -18,7 +18,7 @@ bar:
movq foo(%rip), %rdx
leaq foo-bar(%r14),%r14
addq $bar,%rax # R_X86_64_32S
.quad foo@DTPOFF
// CHECK: Section {
// CHECK: Name: .rela.text
@ -38,6 +38,7 @@ bar:
// CHECK-NEXT: 0x55 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC
// CHECK-NEXT: 0x5C R_X86_64_PC32 foo 0x5C
// CHECK-NEXT: 0x63 R_X86_64_32S .text 0x0
// CHECK-NEXT: 0x67 R_X86_64_DTPOFF64 foo 0x0
// CHECK-NEXT: ]
// CHECK-NEXT: }