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Fix ARM fast isel to correctly flag memory operands to stores. This fixes
-verify-machineinstrs failures on several tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132268 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -207,7 +207,8 @@ class ARMFastISel : public FastISel {
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bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
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const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
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void AddLoadStoreOperands(EVT VT, Address &Addr,
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const MachineInstrBuilder &MIB);
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const MachineInstrBuilder &MIB,
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unsigned Flags);
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};
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} // end anonymous namespace
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@ -852,7 +853,8 @@ void ARMFastISel::ARMSimplifyAddress(Address &Addr, EVT VT) {
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}
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void ARMFastISel::AddLoadStoreOperands(EVT VT, Address &Addr,
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const MachineInstrBuilder &MIB) {
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const MachineInstrBuilder &MIB,
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unsigned Flags) {
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// addrmode5 output depends on the selection dag addressing dividing the
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// offset by 4 that it then later multiplies. Do this here as well.
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if (VT.getSimpleVT().SimpleTy == MVT::f32 ||
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@ -866,7 +868,7 @@ void ARMFastISel::AddLoadStoreOperands(EVT VT, Address &Addr,
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MachineMemOperand *MMO =
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FuncInfo.MF->getMachineMemOperand(
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MachinePointerInfo::getFixedStack(FI, Offset),
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MachineMemOperand::MOLoad,
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Flags,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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// Now add the rest of the operands.
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@ -925,7 +927,7 @@ bool ARMFastISel::ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr) {
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ResultReg = createResultReg(RC);
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MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(Opc), ResultReg);
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AddLoadStoreOperands(VT, Addr, MIB);
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AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOLoad);
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return true;
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}
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@ -984,7 +986,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) {
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MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(StrOpc))
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.addReg(SrcReg, getKillRegState(true));
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AddLoadStoreOperands(VT, Addr, MIB);
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AddLoadStoreOperands(VT, Addr, MIB, MachineMemOperand::MOStore);
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return true;
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}
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