6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-04 06:09:05 +00:00
Code Issues Projects Releases Wiki Activity

Add debug output.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127959 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-03-19 23:02:47 +00:00
parent f6474f69d3
commit c1655e1a3c
2 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/InlineSpiller.cpp
View File

@ -435,6 +435,8 @@ bool InlineSpiller::hoistSpill(LiveInterval &SpillLI, MachineInstr *CopyMI) {
LiveInterval &OrigLI = LIS.getInterval(Original);
VNInfo *OrigVNI = OrigLI.getVNInfoAt(Idx);
StackInt.MergeValueInAsValue(OrigLI, OrigVNI, StackInt.getValNumInfo(0));
DEBUG(dbgs() << "\tmerged orig valno " << OrigVNI->id << ": "
<< StackInt << '\n');
// Already spilled everywhere.
if (SVI.AllDefsAreReloads)
@ -480,6 +482,7 @@ void InlineSpiller::eliminateRedundantSpills(unsigned Reg, VNInfo *VNI) {
// Add all of VNI's live range to StackInt.
LiveInterval &LI = LIS.getInterval(Reg);
StackInt.MergeValueInAsValue(LI, VNI, StackInt.getValNumInfo(0));
DEBUG(dbgs() << "Merged to stack int: " << StackInt << '\n');
// Find all spills and copies of VNI.
for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Reg);
@ -874,6 +877,7 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)
stacklvr.MergeRangesInAsValue(LIS.getInterval(RegsToSpill[i]),
stacklvr.getValNumInfo(0));
DEBUG(dbgs() << "Merged spilled regs: " << stacklvr << '\n');
// Spill around uses of all RegsToSpill.
for (unsigned i = 0, e = RegsToSpill.size(); i != e; ++i)

1
lib/CodeGen/RegAllocGreedy.cpp
View File

@ -1265,6 +1265,7 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg,
// Wait until the second time, when all smaller ranges have been allocated.
// This gives a better picture of the interference to split around.
if (Stage == RS_Original) {
DEBUG(dbgs() << "wait for second round\n");
NewVRegs.push_back(&VirtReg);
return 0;
}