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Remove SPARC backend getpcx instruction's Uses. Also, insert an assert to
ensure %o7 is not assigned as the destination of getpcx instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123304 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -145,6 +145,8 @@ bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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case MachineOperand::MO_Register:
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Operand is not a physical register ");
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assert(MO.getReg() != SP::O7 &&
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"%o7 is assigned as destination for getpcx!");
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operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
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break;
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}
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@ -156,8 +158,8 @@ bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
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O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ;
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O << "\t sethi\t"
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<< "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum << ")), "
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<< operand << '\n' ;
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<< "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
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<< ")), " << operand << '\n' ;
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O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ;
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O << "\tor\t" << operand
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@ -205,7 +205,7 @@ class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstSP<outs, ins, asmstr, pattern>;
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// GETPCX for PIC
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let Defs = [O7], Uses = [O7] in {
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let Defs = [O7] in {
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def GETPCX : Pseudo<(outs getPCX:$getpcseq), (ins), "$getpcseq", [] >;
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}
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