6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-25 14:30:32 +00:00
Code Issues Projects Releases Wiki Activity

Fix my brain cramp by inverting the assertion condition.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76131 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-07-17 00:32:06 +00:00
parent 28ebfcf7de
commit c1b46f91f5
1 changed files with 1 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/VirtRegRewriter.cpp
View File

@ -491,12 +491,10 @@ static void ReMaterialize(MachineBasicBlock &MBB,
const TargetRegisterInfo *TRI,
VirtRegMap &VRM) {
MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
#if 0
#ifndef NDEBUG
const TargetInstrDesc &TID = ReMatDefMI->getDesc();
assert(TID.getNumDefs() != 1 &&
assert(TID.getNumDefs() == 1 &&
"Don't know how to remat instructions that define > 1 values!");
#endif
#endif
TII->reMaterialize(MBB, MII, DestReg,
ReMatDefMI->getOperand(0).getSubReg(), ReMatDefMI);