6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

Make getMinimalPhysRegClass' comment mention what makes it different

Browse Source 
from getPhysicalRegisterRegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107660 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2010-07-06 15:31:55 +00:00
parent ff70fe40aa
commit c2af869d62
2 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
include/llvm/Target/TargetRegisterInfo.h
View File

@@ -320,7 +320,8 @@ public:
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
/// getMinimalPhysRegClass - Returns the Register Class of a physical
/// register of the given type.
/// register of the given type, picking the most sub register class of
/// the right type that contains this physreg.
const TargetRegisterClass *
getMinimalPhysRegClass(unsigned Reg, EVT VT = MVT::Other) const;

3
lib/Target/TargetRegisterInfo.cpp
View File

@@ -61,7 +61,8 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
}
/// getMinimalPhysRegClass - Returns the Register Class of a physical
/// register of the given type.
/// register of the given type, picking the most sub register class of
/// the right type that contains this physreg.
const TargetRegisterClass *
TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
assert(isPhysicalRegister(reg) && "reg must be a physical register");