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Fix a problem where were were literally selecting for INCREASED register
pressure, not decreases register pressure. Fix problem where we accidentally swapped the operands of SHLD, which caused fourinarow to fail. This fixes fourinarow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19697 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1185,11 +1185,11 @@ bool ISel::EmitOrOpOp(SDOperand Op1, SDOperand Op2, unsigned DestReg) {
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} else if (RegSize != 8) {
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unsigned AReg, BReg;
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if (getRegPressure(ShlVal) > getRegPressure(ShrVal)) {
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShrVal);
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} else {
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShlVal);
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}
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unsigned ShAmt = SelectExpr(ShrAmt);
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BuildMI(BB, X86::MOV8rr, 1, X86::CL).addReg(ShAmt);
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@ -1221,11 +1221,11 @@ bool ISel::EmitOrOpOp(SDOperand Op1, SDOperand Op2, unsigned DestReg) {
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} else if (RegSize != 8) {
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unsigned AReg, BReg;
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if (getRegPressure(ShlVal) > getRegPressure(ShrVal)) {
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShlVal);
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BReg = SelectExpr(ShrVal);
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} else {
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShrVal);
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AReg = SelectExpr(ShlVal);
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}
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unsigned ShAmt = SelectExpr(ShlAmt);
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BuildMI(BB, X86::MOV8rr, 1, X86::CL).addReg(ShAmt);
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@ -1250,11 +1250,11 @@ bool ISel::EmitOrOpOp(SDOperand Op1, SDOperand Op2, unsigned DestReg) {
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} else if (RegSize != 8) {
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unsigned AReg, BReg;
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if (getRegPressure(ShlVal) > getRegPressure(ShrVal)) {
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShrVal);
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} else {
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BReg = SelectExpr(ShlVal);
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AReg = SelectExpr(ShrVal);
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BReg = SelectExpr(ShlVal);
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}
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unsigned Opc = RegSize == 16 ? X86::SHRD16rri8 : X86::SHRD32rri8;
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BuildMI(BB, Opc, 3, DestReg).addReg(AReg).addReg(BReg)
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