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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-19 04:31:17 +00:00
Removed unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163104 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -85,7 +85,7 @@ public:
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/// On failure, the target parser is responsible for emitting a diagnostic
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/// explaining the match failure.
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virtual bool
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MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
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MatchInstruction(SMLoc IDLoc, unsigned &Kind,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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SmallVectorImpl<MCInst> &MCInsts,
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unsigned &OrigErrorInfo,
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@ -7457,11 +7457,10 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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MCStreamer &Out) {
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MCInst Inst;
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unsigned Kind;
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unsigned Opcode;
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unsigned ErrorInfo;
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unsigned MatchResult;
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MatchResult = MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo);
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MatchResult = MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo);
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switch (MatchResult) {
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default: break;
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case Match_Success:
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@ -318,10 +318,9 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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MCStreamer &Out) {
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MCInst Inst;
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unsigned Kind;
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unsigned Opcode;
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unsigned ErrorInfo;
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switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, ErrorInfo)) {
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switch (MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo)) {
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default: break;
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case Match_Success:
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Out.EmitInstruction(Inst);
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@ -67,7 +67,7 @@ private:
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SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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MCStreamer &Out);
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bool MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
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bool MatchInstruction(SMLoc IDLoc, unsigned &Kind,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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SmallVectorImpl<MCInst> &MCInsts,
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unsigned &OrigErrorInfo,
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@ -1517,11 +1517,10 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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MCStreamer &Out) {
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unsigned Kind;
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unsigned Opcode;
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unsigned ErrorInfo;
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SmallVector<MCInst, 2> Insts;
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bool Error = MatchInstruction(IDLoc, Kind, Opcode, Operands, Insts,
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bool Error = MatchInstruction(IDLoc, Kind, Operands, Insts,
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ErrorInfo);
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if (!Error)
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for (unsigned i = 0, e = Insts.size(); i != e; ++i)
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@ -1530,7 +1529,7 @@ MatchAndEmitInstruction(SMLoc IDLoc,
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}
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bool X86AsmParser::
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MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
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MatchInstruction(SMLoc IDLoc, unsigned &Kind,
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SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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SmallVectorImpl<MCInst> &MCInsts, unsigned &OrigErrorInfo,
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bool matchingInlineAsm) {
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@ -1572,7 +1571,7 @@ MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
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MCInst Inst;
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// First, try a direct match.
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switch (MatchInstructionImpl(Operands, Kind, Opcode, Inst, OrigErrorInfo,
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switch (MatchInstructionImpl(Operands, Kind, Inst, OrigErrorInfo,
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isParsingIntelSyntax())) {
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default: break;
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case Match_Success:
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@ -1620,19 +1619,19 @@ MatchInstruction(SMLoc IDLoc, unsigned &Kind, unsigned &Opcode,
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Tmp[Base.size()] = Suffixes[0];
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unsigned ErrorInfoIgnore;
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unsigned Match1, Match2, Match3, Match4;
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unsigned tKind, tOpcode;
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unsigned tKind;
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Match1 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
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if (Match1 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
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Match1 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
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if (Match1 == Match_Success) Kind = tKind;
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Tmp[Base.size()] = Suffixes[1];
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Match2 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
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if (Match2 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
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Match2 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
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if (Match2 == Match_Success) Kind = tKind;
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Tmp[Base.size()] = Suffixes[2];
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Match3 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
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if (Match3 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
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Match3 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
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if (Match3 == Match_Success) Kind = tKind;
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Tmp[Base.size()] = Suffixes[3];
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Match4 = MatchInstructionImpl(Operands, tKind, tOpcode, Inst, ErrorInfoIgnore);
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if (Match4 == Match_Success) { Kind = tKind; Opcode = tOpcode; }
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Match4 = MatchInstructionImpl(Operands, tKind, Inst, ErrorInfoIgnore);
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if (Match4 == Match_Success) Kind = tKind;
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// Restore the old token.
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Op->setTokenValue(Base);
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@ -2587,8 +2587,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
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OS << " unsigned MatchInstructionImpl(\n"
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<< " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
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<< " unsigned &Kind, unsigned &Opcode, MCInst &Inst, "
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<< "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n";
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<< " unsigned &Kind, MCInst &Inst, "
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<< "unsigned &ErrorInfo,\n unsigned VariantID = 0);\n";
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if (Info.OperandMatchInfo.size()) {
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OS << "\n enum OperandMatchResultTy {\n";
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@ -2768,8 +2768,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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<< Target.getName() << ClassName << "::\n"
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<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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<< " &Operands,\n";
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OS << " unsigned &Kind, unsigned &Opcode, MCInst &Inst,";
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OS << "\n unsigned &ErrorInfo, unsigned VariantID) {\n";
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OS << " unsigned &Kind, MCInst &Inst, unsigned ";
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OS << "&ErrorInfo,\n unsigned VariantID) {\n";
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OS << " // Eliminate obvious mismatches.\n";
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OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
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@ -2887,7 +2887,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " " << InsnCleanupFn << "(Inst);\n";
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OS << " Kind = it->ConvertFn;\n";
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OS << " Opcode = it->Opcode;\n";
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OS << " return Match_Success;\n";
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OS << " }\n\n";
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