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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-28 19:25:00 +00:00
Convert more static tables of registers used by calling convention to uint16_t to reduce space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1875,13 +1875,13 @@ static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
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static const unsigned IntRegsSize=4, FloatRegsSize=2;
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static const unsigned IntRegs[] = {
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static const uint16_t IntRegs[] = {
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Mips::A0, Mips::A1, Mips::A2, Mips::A3
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};
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static const unsigned F32Regs[] = {
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static const uint16_t F32Regs[] = {
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Mips::F12, Mips::F14
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};
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static const unsigned F64Regs[] = {
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static const uint16_t F64Regs[] = {
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Mips::D6, Mips::D7
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};
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@@ -1960,10 +1960,10 @@ static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
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return false; // CC must always match
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}
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static const unsigned Mips64IntRegs[8] =
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static const uint16_t Mips64IntRegs[8] =
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{Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
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Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
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static const unsigned Mips64DPRegs[8] =
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static const uint16_t Mips64DPRegs[8] =
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{Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64,
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Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64};
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@@ -2030,7 +2030,7 @@ AnalyzeMips64CallOperands(CCState &CCInfo,
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static const unsigned O32IntRegsSize = 4;
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static const unsigned O32IntRegs[] = {
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static const uint16_t O32IntRegs[] = {
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Mips::A0, Mips::A1, Mips::A2, Mips::A3
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};
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@@ -2149,9 +2149,9 @@ PassByValArg64(SDValue& ByValChain, SDValue Chain, DebugLoc dl,
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if (!IsRegLoc)
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LocMemOffset = VA.getLocMemOffset();
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else {
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const unsigned *Reg = std::find(Mips64IntRegs, Mips64IntRegs + 8,
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const uint16_t *Reg = std::find(Mips64IntRegs, Mips64IntRegs + 8,
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VA.getLocReg());
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const unsigned *RegEnd = Mips64IntRegs + 8;
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const uint16_t *RegEnd = Mips64IntRegs + 8;
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// Copy double words to registers.
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for (; (Reg != RegEnd) && (ByValSize >= Offset + 8); ++Reg, Offset += 8) {
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@@ -2574,7 +2574,7 @@ CopyMips64ByValRegs(MachineFunction &MF, SDValue Chain, DebugLoc dl,
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MachineFrameInfo *MFI, bool IsRegLoc,
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SmallVectorImpl<SDValue> &InVals, MipsFunctionInfo *MipsFI,
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EVT PtrTy) {
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const unsigned *Reg = Mips64IntRegs + 8;
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const uint16_t *Reg = Mips64IntRegs + 8;
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int FOOffset; // Frame object offset from virtual frame pointer.
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if (IsRegLoc) {
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@@ -2743,7 +2743,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,
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if (isVarArg) {
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unsigned NumOfRegs = IsO32 ? 4 : 8;
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const unsigned *ArgRegs = IsO32 ? O32IntRegs : Mips64IntRegs;
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const uint16_t *ArgRegs = IsO32 ? O32IntRegs : Mips64IntRegs;
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unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumOfRegs);
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int FirstRegSlotOffset = IsO32 ? 0 : -64 ; // offset of $a0's slot.
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const TargetRegisterClass *RC
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