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AArch64/ARM64: add more specific diagnostic for invalid vector lanes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208081 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-05-06 12:50:44 +00:00
parent 6e64f90dc5
commit c5f9aff43e
2 changed files with 21 additions and 4 deletions
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13
lib/Target/ARM64/ARM64InstrFormats.td
View File

@ -3735,10 +3735,15 @@ multiclass FPMoveImmediate<string asm> {
// AdvSIMD
//----------------------------------------------------------------------------
def VectorIndexBOperand : AsmOperandClass { let Name = "VectorIndexB"; }
def VectorIndexHOperand : AsmOperandClass { let Name = "VectorIndexH"; }
def VectorIndexSOperand : AsmOperandClass { let Name = "VectorIndexS"; }
def VectorIndexDOperand : AsmOperandClass { let Name = "VectorIndexD"; }
class AsmVectorIndex<string Suffix> : AsmOperandClass {
let Name = "VectorIndex" # Suffix;
let DiagnosticType = "InvalidIndex" # Suffix;
}
def VectorIndexBOperand : AsmVectorIndex<"B">;
def VectorIndexHOperand : AsmVectorIndex<"H">;
def VectorIndexSOperand : AsmVectorIndex<"S">;
def VectorIndexDOperand : AsmVectorIndex<"D">;
def VectorIndexB : Operand<i64>, ImmLeaf<i64, [{
return ((uint64_t)Imm) < 16;
}]> {

12
lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
View File

@ -3885,6 +3885,14 @@ bool ARM64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) {
return Error(Loc, "immediate must be an integer in range [1, 32].");
case Match_InvalidImm1_64:
return Error(Loc, "immediate must be an integer in range [1, 64].");
case Match_InvalidIndexB:
return Error(Loc, "vector lane must be an integer in range [0, 15].");
case Match_InvalidIndexH:
return Error(Loc, "vector lane must be an integer in range [0, 7].");
case Match_InvalidIndexS:
return Error(Loc, "vector lane must be an integer in range [0, 3].");
case Match_InvalidIndexD:
return Error(Loc, "vector lane must be an integer in range [0, 1].");
case Match_InvalidLabel:
return Error(Loc, "expected label or encodable integer pc offset");
case Match_MRS:
@ -4432,6 +4440,10 @@ bool ARM64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_InvalidImm1_16:
case Match_InvalidImm1_32:
case Match_InvalidImm1_64:
case Match_InvalidIndexB:
case Match_InvalidIndexH:
case Match_InvalidIndexS:
case Match_InvalidIndexD:
case Match_InvalidLabel:
case Match_MSR:
case Match_MRS: {