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Modernize naming convention for class members.

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No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157079 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-05-18 22:10:15 +00:00
parent b3776d33cf
commit c696c8bd35
2 changed files with 45 additions and 45 deletions
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50
include/llvm/CodeGen/LiveRangeEdit.h
View File

@ -55,29 +55,29 @@ public:
};
private:
LiveInterval &parent_;
SmallVectorImpl<LiveInterval*> &newRegs_;
LiveInterval &Parent;
SmallVectorImpl<LiveInterval*> &NewRegs;
MachineRegisterInfo &MRI;
LiveIntervals &LIS;
VirtRegMap *VRM;
const TargetInstrInfo &TII;
Delegate *const delegate_;
Delegate *const TheDelegate;
/// firstNew_ - Index of the first register added to newRegs_.
const unsigned firstNew_;
/// FirstNew - Index of the first register added to NewRegs.
const unsigned FirstNew;
/// scannedRemattable_ - true when remattable values have been identified.
bool scannedRemattable_;
/// ScannedRemattable - true when remattable values have been identified.
bool ScannedRemattable;
/// remattable_ - Values defined by remattable instructions as identified by
/// Remattable - Values defined by remattable instructions as identified by
/// tii.isTriviallyReMaterializable().
SmallPtrSet<const VNInfo*,4> remattable_;
SmallPtrSet<const VNInfo*,4> Remattable;
/// rematted_ - Values that were actually rematted, and so need to have their
/// Rematted - Values that were actually rematted, and so need to have their
/// live range trimmed or entirely removed.
SmallPtrSet<const VNInfo*,4> rematted_;
SmallPtrSet<const VNInfo*,4> Rematted;
/// scanRemattable - Identify the parent_ values that may rematerialize.
/// scanRemattable - Identify the Parent values that may rematerialize.
void scanRemattable(AliasAnalysis *aa);
/// allUsesAvailableAt - Return true if all registers used by OrigMI at
@ -105,26 +105,26 @@ public:
LiveIntervals &lis,
VirtRegMap *vrm,
Delegate *delegate = 0)
: parent_(parent), newRegs_(newRegs),
: Parent(parent), NewRegs(newRegs),
MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
TII(*MF.getTarget().getInstrInfo()),
delegate_(delegate),
firstNew_(newRegs.size()),
scannedRemattable_(false) {}
TheDelegate(delegate),
FirstNew(newRegs.size()),
ScannedRemattable(false) {}
LiveInterval &getParent() const { return parent_; }
unsigned getReg() const { return parent_.reg; }
LiveInterval &getParent() const { return Parent; }
unsigned getReg() const { return Parent.reg; }
/// Iterator for accessing the new registers added by this edit.
typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator;
iterator begin() const { return newRegs_.begin()+firstNew_; }
iterator end() const { return newRegs_.end(); }
unsigned size() const { return newRegs_.size()-firstNew_; }
iterator begin() const { return NewRegs.begin()+FirstNew; }
iterator end() const { return NewRegs.end(); }
unsigned size() const { return NewRegs.size()-FirstNew; }
bool empty() const { return size() == 0; }
LiveInterval *get(unsigned idx) const { return newRegs_[idx+firstNew_]; }
LiveInterval *get(unsigned idx) const { return NewRegs[idx+FirstNew]; }
ArrayRef<LiveInterval*> regs() const {
return makeArrayRef(newRegs_).slice(firstNew_);
return makeArrayRef(NewRegs).slice(FirstNew);
}
/// createFrom - Create a new virtual register based on OldReg.
@ -174,12 +174,12 @@ public:
/// markRematerialized - explicitly mark a value as rematerialized after doing
/// it manually.
void markRematerialized(const VNInfo *ParentVNI) {
rematted_.insert(ParentVNI);
Rematted.insert(ParentVNI);
}
/// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
bool didRematerialize(const VNInfo *ParentVNI) const {
return rematted_.count(ParentVNI);
return Rematted.count(ParentVNI);
}
/// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try

40
lib/CodeGen/LiveRangeEdit.cpp
View File

@ -38,7 +38,7 @@ LiveInterval &LiveRangeEdit::createFrom(unsigned OldReg) {
VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
}
LiveInterval &LI = LIS.getOrCreateInterval(VReg);
newRegs_.push_back(&LI);
NewRegs.push_back(&LI);
return LI;
}
@ -46,16 +46,16 @@ bool LiveRangeEdit::checkRematerializable(VNInfo *VNI,
const MachineInstr *DefMI,
AliasAnalysis *aa) {
assert(DefMI && "Missing instruction");
scannedRemattable_ = true;
ScannedRemattable = true;
if (!TII.isTriviallyReMaterializable(DefMI, aa))
return false;
remattable_.insert(VNI);
Remattable.insert(VNI);
return true;
}
void LiveRangeEdit::scanRemattable(AliasAnalysis *aa) {
for (LiveInterval::vni_iterator I = parent_.vni_begin(),
E = parent_.vni_end(); I != E; ++I) {
for (LiveInterval::vni_iterator I = Parent.vni_begin(),
E = Parent.vni_end(); I != E; ++I) {
VNInfo *VNI = *I;
if (VNI->isUnused())
continue;
@ -64,13 +64,13 @@ void LiveRangeEdit::scanRemattable(AliasAnalysis *aa) {
continue;
checkRematerializable(VNI, DefMI, aa);
}
scannedRemattable_ = true;
ScannedRemattable = true;
}
bool LiveRangeEdit::anyRematerializable(AliasAnalysis *aa) {
if (!scannedRemattable_)
if (!ScannedRemattable)
scanRemattable(aa);
return !remattable_.empty();
return !Remattable.empty();
}
/// allUsesAvailableAt - Return true if all registers used by OrigMI at
@ -101,10 +101,10 @@ bool LiveRangeEdit::allUsesAvailableAt(const MachineInstr *OrigMI,
bool LiveRangeEdit::canRematerializeAt(Remat &RM,
SlotIndex UseIdx,
bool cheapAsAMove) {
assert(scannedRemattable_ && "Call anyRematerializable first");
assert(ScannedRemattable && "Call anyRematerializable first");
// Use scanRemattable info.
if (!remattable_.count(RM.ParentVNI))
if (!Remattable.count(RM.ParentVNI))
return false;
// No defining instruction provided.
@ -136,13 +136,13 @@ SlotIndex LiveRangeEdit::rematerializeAt(MachineBasicBlock &MBB,
bool Late) {
assert(RM.OrigMI && "Invalid remat");
TII.reMaterialize(MBB, MI, DestReg, 0, RM.OrigMI, tri);
rematted_.insert(RM.ParentVNI);
Rematted.insert(RM.ParentVNI);
return LIS.getSlotIndexes()->insertMachineInstrInMaps(--MI, Late)
.getRegSlot();
}
void LiveRangeEdit::eraseVirtReg(unsigned Reg) {
if (delegate_ && delegate_->LRE_CanEraseVirtReg(Reg))
if (TheDelegate && TheDelegate->LRE_CanEraseVirtReg(Reg))
LIS.removeInterval(Reg);
}
@ -242,8 +242,8 @@ void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
// Remove defined value.
if (MOI->isDef()) {
if (VNInfo *VNI = LI.getVNInfoAt(Idx)) {
if (delegate_)
delegate_->LRE_WillShrinkVirtReg(LI.reg);
if (TheDelegate)
TheDelegate->LRE_WillShrinkVirtReg(LI.reg);
LI.removeValNo(VNI);
if (LI.empty()) {
ToShrink.remove(&LI);
@ -253,8 +253,8 @@ void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
}
}
if (delegate_)
delegate_->LRE_WillEraseInstruction(MI);
if (TheDelegate)
TheDelegate->LRE_WillEraseInstruction(MI);
LIS.RemoveMachineInstrFromMaps(MI);
MI->eraseFromParent();
++NumDCEDeleted;
@ -268,8 +268,8 @@ void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
ToShrink.pop_back();
if (foldAsLoad(LI, Dead))
continue;
if (delegate_)
delegate_->LRE_WillShrinkVirtReg(LI->reg);
if (TheDelegate)
TheDelegate->LRE_WillShrinkVirtReg(LI->reg);
if (!LIS.shrinkToUses(LI, &Dead))
continue;
@ -304,8 +304,8 @@ void LiveRangeEdit::eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
// interval must contain all the split products, and LI doesn't.
if (IsOriginal)
VRM->setIsSplitFromReg(Dups.back()->reg, 0);
if (delegate_)
delegate_->LRE_DidCloneVirtReg(Dups.back()->reg, LI->reg);
if (TheDelegate)
TheDelegate->LRE_DidCloneVirtReg(Dups.back()->reg, LI->reg);
}
ConEQ.Distribute(&Dups[0], MRI);
}