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ARM optional size suffix for VLDR/VSTR syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144427 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1163,3 +1163,12 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm),
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def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
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// The size suffix is optional for VLDR/VSTR
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def : VFP2InstAlias<"vldr$p $Dd, $addr",
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(VLDRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
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def : VFP2InstAlias<"vldr$p $Sd, $addr",
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(VLDRS SPR:$Sd, addrmode5:$addr, pred:$p)>;
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def : VFP2InstAlias<"vstr$p $Dd, $addr",
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(VSTRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
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def : VFP2InstAlias<"vstr$p $Sd, $addr",
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(VSTRS SPR:$Sd, addrmode5:$addr, pred:$p)>;
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@ -173,7 +173,12 @@
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vmov r0, r1, d16
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@ CHECK: vldr.64 d17, [r0] @ encoding: [0x00,0x1b,0xd0,0xed]
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@ CHECK: vldr.32 s0, [lr] @ encoding: [0x00,0x0a,0x9e,0xed]
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@ CHECK: vldr.64 d0, [lr] @ encoding: [0x00,0x0b,0x9e,0xed]
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vldr.64 d17, [r0]
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vldr s0, [lr]
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vldr d0, [lr]
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@ CHECK: vldr.64 d1, [r2, #32] @ encoding: [0x08,0x1b,0x92,0xed]
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@ CHECK: vldr.64 d1, [r2, #-32] @ encoding: [0x08,0x1b,0x12,0xed]
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@ -211,9 +216,14 @@
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@ CHECK: vstr.64 d4, [r1] @ encoding: [0x00,0x4b,0x81,0xed]
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@ CHECK: vstr.64 d4, [r1, #24] @ encoding: [0x06,0x4b,0x81,0xed]
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@ CHECK: vstr.64 d4, [r1, #-24] @ encoding: [0x06,0x4b,0x01,0xed]
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@ CHECK: vstr.32 s0, [lr] @ encoding: [0x00,0x0a,0x8e,0xed]
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@ CHECK: vstr.64 d0, [lr] @ encoding: [0x00,0x0b,0x8e,0xed]
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vstr.64 d4, [r1]
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vstr.64 d4, [r1, #24]
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vstr.64 d4, [r1, #-24]
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vstr s0, [lr]
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vstr d0, [lr]
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@ CHECK: vstr.32 s4, [r1] @ encoding: [0x00,0x2a,0x81,0xed]
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@ CHECK: vstr.32 s4, [r1, #24] @ encoding: [0x06,0x2a,0x81,0xed]
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