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Revert "Add a target legalize hook for SplitVectorOperand"

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This reverts commit 187198. It broke the bots.

The soft float test probably needs a -triple because of name differences.
On the hard float test I am getting a "roundss $1, %xmm0, %xmm0", instead of
"vroundss $1, %xmm0, %xmm0, %xmm0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187201 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2013-07-26 13:18:16 +00:00
parent 5a24ed951b
commit c735c1c2ae
4 changed files with 1 additions and 46 deletions
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4
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
View File

@ -1031,10 +1031,6 @@ bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
dbgs() << "\n");
SDValue Res = SDValue();
// See if the target wants to custom split this node.
if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
return false;
if (Res.getNode() == 0) {
switch (N->getOpcode()) {
default:

2
lib/Target/X86/X86ISelLowering.cpp
View File

@ -996,7 +996,7 @@ void X86TargetLowering::resetOperationActions() {
setLoadExtAction(ISD::EXTLOAD, MVT::v2f32, Legal);
}
if (!TM.Options.UseSoftFloat && Subtarget->hasSSE41()) {
if (Subtarget->hasSSE41()) {
setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
setOperationAction(ISD::FCEIL, MVT::f32, Legal);
setOperationAction(ISD::FTRUNC, MVT::f32, Legal);

30
test/CodeGen/NVPTX/vector-stores.ll
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@ -1,30 +0,0 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
; CHECK: .visible .func foo1
; CHECK: st.v2.f32
define void @foo1(<2 x float> %val, <2 x float>* %ptr) {
store <2 x float> %val, <2 x float>* %ptr
ret void
}
; CHECK: .visible .func foo2
; CHECK: st.v4.f32
define void @foo2(<4 x float> %val, <4 x float>* %ptr) {
store <4 x float> %val, <4 x float>* %ptr
ret void
}
; CHECK: .visible .func foo3
; CHECK: st.v2.u32
define void @foo3(<2 x i32> %val, <2 x i32>* %ptr) {
store <2 x i32> %val, <2 x i32>* %ptr
ret void
}
; CHECK: .visible .func foo4
; CHECK: st.v4.u32
define void @foo4(<4 x i32> %val, <4 x i32>* %ptr) {
store <4 x i32> %val, <4 x i32>* %ptr
ret void
}

11
test/CodeGen/X86/floor-soft-float.ll
View File

@ -1,11 +0,0 @@
; RUN: llc < %s -march=x86-64 -mattr=+sse41 -soft-float=0 | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
; RUN: llc < %s -march=x86-64 -mattr=+sse41 -soft-float=1 | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
declare float @llvm.floor.f32(float)
; CHECK-SOFT-FLOAT: callq _floorf
; CHECK-HARD-FLOAT: vroundss $1, %xmm0, %xmm0, %xmm0
define float @myfloor(float %a) {
%val = tail call float @llvm.floor.f32(float %a)
ret float %val
}