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Revert "Revert "InstCombine: Improvement to check if signed addition overflows.""
This reverts commit r209762, bringing back r209746. It was not responsible for the libc++ build failure git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209776 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -889,11 +889,34 @@ static inline Value *dyn_castFoldableMul(Value *V, Constant *&CST) {
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return nullptr;
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}
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// If one of the operands only has one non-zero bit, and if the other
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// operand has a known-zero bit in a more significant place than it (not
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// including the sign bit) the ripple may go up to and fill the zero, but
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// won't change the sign. For example, (X & ~4) + 1.
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// FIXME: Handle case where LHS has a zero before the 1 in the RHS, but also
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// has one after.
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static bool CheckRippleForAdd(APInt Op0KnownZero, APInt Op0KnownOne,
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APInt Op1KnownZero, APInt Op1KnownOne) {
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// Make sure that one of the operand has only one bit set to 1 and all other
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// bit set to 0.
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if ((~Op1KnownZero).countPopulation() == 1) {
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int BitWidth = Op0KnownZero.getBitWidth();
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// Ignore Sign Bit.
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Op0KnownZero.clearBit(BitWidth - 1);
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int Op1OnePosition = BitWidth - Op1KnownOne.countLeadingZeros() - 1;
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int Op0ZeroPosition = BitWidth - Op0KnownZero.countLeadingZeros() - 1;
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if ((Op0ZeroPosition != (BitWidth - 1)) &&
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(Op0ZeroPosition >= Op1OnePosition))
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return true;
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}
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return false;
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}
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/// WillNotOverflowSignedAdd - Return true if we can prove that:
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/// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS))
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/// This basically requires proving that the add in the original type would not
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/// overflow to change the sign bit or have a carry out.
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/// TODO: Handle this for Vectors.
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bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) {
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// There are different heuristics we can use for this. Here are some simple
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// ones.
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@ -905,14 +928,29 @@ bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) {
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if (ComputeNumSignBits(LHS) > 1 && ComputeNumSignBits(RHS) > 1)
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return true;
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if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) {
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// If one of the operands only has one non-zero bit, and if the other operand
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// has a known-zero bit in a more significant place than it (not including the
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// sign bit) the ripple may go up to and fill the zero, but won't change the
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// sign. For example, (X & ~4) + 1.
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int BitWidth = IT->getBitWidth();
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APInt LHSKnownZero(BitWidth, 0, /*isSigned*/ true);
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APInt LHSKnownOne(BitWidth, 0, /*isSigned*/ true);
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computeKnownBits(LHS, LHSKnownZero, LHSKnownOne);
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// TODO: Implement.
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APInt RHSKnownZero(BitWidth, 0, /*isSigned*/ true);
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APInt RHSKnownOne(BitWidth, 0, /*isSigned*/ true);
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computeKnownBits(RHS, RHSKnownZero, RHSKnownOne);
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// Addition of two 2's compliment numbers having opposite signs will never
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// overflow.
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if ((LHSKnownOne[BitWidth - 1] && RHSKnownZero[BitWidth - 1]) ||
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(LHSKnownZero[BitWidth - 1] && RHSKnownOne[BitWidth - 1]))
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return true;
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// Check if carry bit of addition will not cause overflow.
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if (CheckRippleForAdd(LHSKnownZero, LHSKnownOne, RHSKnownZero, RHSKnownOne))
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return true;
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if (CheckRippleForAdd(RHSKnownZero, RHSKnownOne, LHSKnownZero, LHSKnownOne))
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return true;
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}
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return false;
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}
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56
test/Transforms/InstCombine/AddOverflow.ll
Normal file
56
test/Transforms/InstCombine/AddOverflow.ll
Normal file
@ -0,0 +1,56 @@
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK-LABEL: @ripple(
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; CHECK: add nsw i16 %tmp1, 1
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define i32 @ripple(i16 signext %x) {
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bb:
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%tmp = sext i16 %x to i32
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%tmp1 = and i32 %tmp, -5
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%tmp2 = trunc i32 %tmp1 to i16
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%tmp3 = sext i16 %tmp2 to i32
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%tmp4 = add i32 %tmp3, 1
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ret i32 %tmp4
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}
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; CHECK-LABEL: @ripplenot(
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; CHECK: add i32 %tmp3, 4
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define i32 @ripplenot(i16 signext %x) {
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bb:
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%tmp = sext i16 %x to i32
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%tmp1 = and i32 %tmp, -3
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%tmp2 = trunc i32 %tmp1 to i16
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%tmp3 = sext i16 %tmp2 to i32
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%tmp4 = add i32 %tmp3, 4
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ret i32 %tmp4
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}
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; CHECK-LABEL: @oppositesign(
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; CHECK: add nsw i16 %tmp1, 4
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define i32 @oppositesign(i16 signext %x) {
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bb:
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%tmp = sext i16 %x to i32
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%tmp1 = or i32 %tmp, 32768
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%tmp2 = trunc i32 %tmp1 to i16
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%tmp3 = sext i16 %tmp2 to i32
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%tmp4 = add i32 %tmp3, 4
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ret i32 %tmp4
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}
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; CHECK-LABEL: @ripplenot_var(
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; CHECK: add i32 %tmp6, %tmp7
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define i32 @ripplenot_var(i16 signext %x, i16 signext %y) {
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bb:
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%tmp = sext i16 %x to i32
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%tmp1 = and i32 %tmp, -5
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%tmp2 = trunc i32 %tmp1 to i16
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%tmp3 = sext i16 %y to i32
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%tmp4 = or i32 %tmp3, 2
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%tmp5 = trunc i32 %tmp4 to i16
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%tmp6 = sext i16 %tmp5 to i32
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%tmp7 = sext i16 %tmp2 to i32
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%tmp8 = add i32 %tmp6, %tmp7
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ret i32 %tmp8
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}
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