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[NVPTX] Add 'b' asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211946 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -2605,6 +2605,7 @@ NVPTXTargetLowering::getConstraintType(const std::string &Constraint) const {
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switch (Constraint[0]) {
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switch (Constraint[0]) {
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default:
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default:
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break;
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break;
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case 'b':
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case 'r':
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case 'r':
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case 'h':
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case 'h':
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case 'c':
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case 'c':
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@@ -2624,6 +2625,8 @@ NVPTXTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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MVT VT) const {
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MVT VT) const {
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if (Constraint.size() == 1) {
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if (Constraint.size() == 1) {
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switch (Constraint[0]) {
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switch (Constraint[0]) {
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case 'b':
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return std::make_pair(0U, &NVPTX::Int1RegsRegClass);
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case 'c':
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case 'c':
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return std::make_pair(0U, &NVPTX::Int16RegsRegClass);
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return std::make_pair(0U, &NVPTX::Int16RegsRegClass);
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case 'h':
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case 'h':
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@@ -7,3 +7,10 @@ entry:
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%0 = call float asm "ex2.approx.ftz.f32 $0, $1;", "=f,f"(float %x)
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%0 = call float asm "ex2.approx.ftz.f32 $0, $1;", "=f,f"(float %x)
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ret float %0
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ret float %0
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}
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}
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define i32 @foo(i1 signext %cond, i32 %a, i32 %b) #0 {
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entry:
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; CHECK: selp.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %p{{[0-9]+}}
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%0 = tail call i32 asm "selp.b32 $0, $1, $2, $3;", "=r,r,r,b"(i32 %a, i32 %b, i1 %cond)
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ret i32 %0
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}
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