mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-07 12:28:24 +00:00
Remove a bunch of ad-hoc target-specific flags that were only used by the
old asmprinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -36,19 +36,15 @@ def X86InstrInfo : InstrInfo {
|
|||||||
let TSFlagsFields = ["FormBits",
|
let TSFlagsFields = ["FormBits",
|
||||||
"hasOpSizePrefix",
|
"hasOpSizePrefix",
|
||||||
"Prefix",
|
"Prefix",
|
||||||
"MemTypeBits",
|
|
||||||
"ImmTypeBits",
|
"ImmTypeBits",
|
||||||
"FPFormBits",
|
"FPFormBits",
|
||||||
"printImplicitUsesAfter",
|
|
||||||
"Opcode"];
|
"Opcode"];
|
||||||
let TSFlagsShifts = [0,
|
let TSFlagsShifts = [0,
|
||||||
5,
|
5,
|
||||||
6,
|
6,
|
||||||
10,
|
10,
|
||||||
13,
|
12,
|
||||||
15,
|
16];
|
||||||
18,
|
|
||||||
19];
|
|
||||||
}
|
}
|
||||||
|
|
||||||
def X86 : Target {
|
def X86 : Target {
|
||||||
|
@@ -108,22 +108,10 @@ namespace X86II {
|
|||||||
DC = 7 << Op0Shift, DD = 8 << Op0Shift,
|
DC = 7 << Op0Shift, DD = 8 << Op0Shift,
|
||||||
DE = 9 << Op0Shift, DF = 10 << Op0Shift,
|
DE = 9 << Op0Shift, DF = 10 << Op0Shift,
|
||||||
|
|
||||||
//===------------------------------------------------------------------===//
|
|
||||||
// This three-bit field describes the size of a memory operand. Zero is
|
|
||||||
// unused so that we can tell if we forgot to set a value.
|
|
||||||
MemShift = 10,
|
|
||||||
MemMask = 7 << MemShift,
|
|
||||||
Mem8 = 1 << MemShift,
|
|
||||||
Mem16 = 2 << MemShift,
|
|
||||||
Mem32 = 3 << MemShift,
|
|
||||||
Mem64 = 4 << MemShift,
|
|
||||||
Mem80 = 5 << MemShift,
|
|
||||||
Mem128 = 6 << MemShift,
|
|
||||||
|
|
||||||
//===------------------------------------------------------------------===//
|
//===------------------------------------------------------------------===//
|
||||||
// This two-bit field describes the size of an immediate operand. Zero is
|
// This two-bit field describes the size of an immediate operand. Zero is
|
||||||
// unused so that we can tell if we forgot to set a value.
|
// unused so that we can tell if we forgot to set a value.
|
||||||
ImmShift = 13,
|
ImmShift = 10,
|
||||||
ImmMask = 7 << ImmShift,
|
ImmMask = 7 << ImmShift,
|
||||||
Imm8 = 1 << ImmShift,
|
Imm8 = 1 << ImmShift,
|
||||||
Imm16 = 2 << ImmShift,
|
Imm16 = 2 << ImmShift,
|
||||||
@@ -133,7 +121,7 @@ namespace X86II {
|
|||||||
// FP Instruction Classification... Zero is non-fp instruction.
|
// FP Instruction Classification... Zero is non-fp instruction.
|
||||||
|
|
||||||
// FPTypeMask - Mask for all of the FP types...
|
// FPTypeMask - Mask for all of the FP types...
|
||||||
FPTypeShift = 15,
|
FPTypeShift = 12,
|
||||||
FPTypeMask = 7 << FPTypeShift,
|
FPTypeMask = 7 << FPTypeShift,
|
||||||
|
|
||||||
// NotFP - The default, set for instructions that do not use FP registers.
|
// NotFP - The default, set for instructions that do not use FP registers.
|
||||||
@@ -165,13 +153,10 @@ namespace X86II {
|
|||||||
// SpecialFP - Special instruction forms. Dispatch by opcode explicitly.
|
// SpecialFP - Special instruction forms. Dispatch by opcode explicitly.
|
||||||
SpecialFP = 7 << FPTypeShift,
|
SpecialFP = 7 << FPTypeShift,
|
||||||
|
|
||||||
// PrintImplUsesAfter - Print out implicit uses in the assembly output after
|
// Bit 15 is unused.
|
||||||
// the normal operands.
|
OpcodeShift = 16,
|
||||||
PrintImplUsesAfter = 1 << 18,
|
|
||||||
|
|
||||||
OpcodeShift = 19,
|
|
||||||
OpcodeMask = 0xFF << OpcodeShift,
|
OpcodeMask = 0xFF << OpcodeShift,
|
||||||
// Bits 27 -> 31 are unused
|
// Bits 24 -> 31 are unused
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -62,18 +62,6 @@ def Imm8 : ImmType<1>;
|
|||||||
def Imm16 : ImmType<2>;
|
def Imm16 : ImmType<2>;
|
||||||
def Imm32 : ImmType<3>;
|
def Imm32 : ImmType<3>;
|
||||||
|
|
||||||
// MemType - This specifies the immediate type used by an instruction. This is
|
|
||||||
// part of the ad-hoc solution used to emit machine instruction encodings by our
|
|
||||||
// machine code emitter.
|
|
||||||
class MemType<bits<3> val> {
|
|
||||||
bits<3> Value = val;
|
|
||||||
}
|
|
||||||
def NoMem : MemType<0>;
|
|
||||||
def Mem16 : MemType<2>;
|
|
||||||
def Mem32 : MemType<3>;
|
|
||||||
def Mem64 : MemType<4>;
|
|
||||||
def Mem80 : MemType<5>;
|
|
||||||
|
|
||||||
// FPFormat - This specifies what form this FP instruction has. This is used by
|
// FPFormat - This specifies what form this FP instruction has. This is used by
|
||||||
// the Floating-Point stackifier pass.
|
// the Floating-Point stackifier pass.
|
||||||
class FPFormat<bits<3> val> {
|
class FPFormat<bits<3> val> {
|
||||||
@@ -89,26 +77,23 @@ def CondMovFP : FPFormat<6>;
|
|||||||
def SpecialFP : FPFormat<7>;
|
def SpecialFP : FPFormat<7>;
|
||||||
|
|
||||||
|
|
||||||
class X86Inst<string nam, bits<8> opcod, Format f, MemType m, ImmType i> : Instruction {
|
class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr> : Instruction {
|
||||||
let Namespace = "X86";
|
let Namespace = "X86";
|
||||||
|
|
||||||
let Name = nam;
|
|
||||||
bits<8> Opcode = opcod;
|
bits<8> Opcode = opcod;
|
||||||
Format Form = f;
|
Format Form = f;
|
||||||
bits<5> FormBits = Form.Value;
|
bits<5> FormBits = Form.Value;
|
||||||
MemType MemT = m;
|
|
||||||
bits<3> MemTypeBits = MemT.Value;
|
|
||||||
ImmType ImmT = i;
|
ImmType ImmT = i;
|
||||||
bits<2> ImmTypeBits = ImmT.Value;
|
bits<2> ImmTypeBits = ImmT.Value;
|
||||||
|
|
||||||
|
dag OperandList = ops;
|
||||||
|
string AsmString = AsmStr;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Attributes specific to X86 instructions...
|
// Attributes specific to X86 instructions...
|
||||||
//
|
//
|
||||||
bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix?
|
bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix?
|
||||||
|
|
||||||
// Flag whether implicit register usage is printed after the instruction.
|
|
||||||
bit printImplicitUsesAfter = 0;
|
|
||||||
|
|
||||||
bits<4> Prefix = 0; // Which prefix byte does this inst have?
|
bits<4> Prefix = 0; // Which prefix byte does this inst have?
|
||||||
FPFormat FPForm; // What flavor of FP instruction is this?
|
FPFormat FPForm; // What flavor of FP instruction is this?
|
||||||
bits<3> FPFormBits = 0;
|
bits<3> FPFormBits = 0;
|
||||||
@@ -119,12 +104,6 @@ class Imp<list<Register> uses, list<Register> defs> {
|
|||||||
list<Register> Defs = defs;
|
list<Register> Defs = defs;
|
||||||
}
|
}
|
||||||
|
|
||||||
// II - InstructionInfo - this will eventually replace the I class.
|
|
||||||
class II<dag ops, string AsmStr> {
|
|
||||||
dag OperandList = ops;
|
|
||||||
string AsmString = AsmStr;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// Prefix byte classes which are used to indicate to the ad-hoc machine code
|
// Prefix byte classes which are used to indicate to the ad-hoc machine code
|
||||||
// emitter that various prefix bytes are required.
|
// emitter that various prefix bytes are required.
|
||||||
@@ -144,12 +123,11 @@ class DF { bits<4> Prefix = 10; }
|
|||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Instruction templates...
|
// Instruction templates...
|
||||||
|
|
||||||
class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<"", o, f, NoMem, NoImm>, II<ops, asm>;
|
class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, NoImm, ops, asm>;
|
||||||
|
|
||||||
class Ii<bits<8> o, Format f, ImmType i> : X86Inst<"", o, f, NoMem, i>;
|
class Ii8 <bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm8 , ops, asm>;
|
||||||
class Ii8 <bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm8 >, II<ops, asm>;
|
class Ii16<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm16, ops, asm>;
|
||||||
class Ii16<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm16>, II<ops, asm>;
|
class Ii32<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm32, ops, asm>;
|
||||||
class Ii32<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm32>, II<ops, asm>;
|
|
||||||
|
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
// Instruction list...
|
// Instruction list...
|
||||||
@@ -893,7 +871,7 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (ops R32:$dst, i16mem:$src), "movzx $dst, $s
|
|||||||
|
|
||||||
// Floating point instruction template
|
// Floating point instruction template
|
||||||
class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
|
class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
|
||||||
: X86Inst<"", o, F, NoMem, NoImm>, II<ops, asm> {
|
: X86Inst<o, F, NoImm, ops, asm> {
|
||||||
let FPForm = fp; let FPFormBits = FPForm.Value;
|
let FPForm = fp; let FPFormBits = FPForm.Value;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user