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Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156608 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -914,7 +914,9 @@ public:
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// Immediate offset in range [-255, 255].
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if (!Memory.OffsetImm) return true;
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int64_t Val = Memory.OffsetImm->getValue();
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return Val > -256 && Val < 256;
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// The #-0 offset is encoded as INT32_MIN, and we have to check
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// for this too.
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return (Val > -256 && Val < 256) || Val == INT32_MIN;
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}
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bool isAM3Offset() const {
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if (Kind != k_Immediate && Kind != k_PostIndexRegister)
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@ -426,9 +426,13 @@ void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
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return;
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}
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if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
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//If the op is sub we have to print the immediate even if it is 0
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unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm());
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ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm());
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if (ImmOffs || (op == ARM_AM::sub))
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O << ", #"
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<< ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO3.getImm()))
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<< ARM_AM::getAddrOpcStr(op)
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<< ImmOffs;
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O << ']';
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}
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@ -74,3 +74,6 @@
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@ CHECK: cpsie none, #0 @ encoding: [0x00,0x00,0x0a,0xf1]
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cpsie none, #0
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@ CHECK: strh r3, [r2, #-0] @ encoding: [0xb0,0x30,0x42,0xe1]
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strh r3, [r2, #-0]
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