* Tabs to spaces

* Send an error message to std::cerr before abort()ing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14381 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-06-24 23:19:36 +00:00
parent a1d90eb7bf
commit ca428df792

View File

@ -39,24 +39,25 @@ static unsigned getIdx(const TargetRegisterClass *RC) {
case 2: return 1;
case 4: return 2;
}
}
else if (RC == PowerPC::FPRCRegisterClass) {
} else if (RC == PowerPC::FPRCRegisterClass) {
switch (RC->getSize()) {
default: assert(0 && "Invalid data size!");
case 4: return 3;
case 8: return 4;
}
}
std::cerr << "Invalid register class to getIdx()!\n";
abort();
}
int PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
int
PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const {
static const unsigned Opcode[] =
{ PPC32::STB, PPC32::STH, PPC32::STW, PPC32::STFS, PPC32::STFD };
static const unsigned Opcode[] = {
PPC32::STB, PPC32::STH, PPC32::STW, PPC32::STFS, PPC32::STFD
};
unsigned OC = Opcode[getIdx(RC)];
MBB.insert(MI, addFrameReference(BuildMI(OC, 3).addReg(SrcReg),FrameIdx));
return 1;
@ -66,9 +67,9 @@ int PowerPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC) const{
static const unsigned Opcode[] =
{ PPC32::LBZ, PPC32::LHZ, PPC32::LWZ, PPC32::LFS, PPC32::LFD };
static const unsigned Opcode[] = {
PPC32::LBZ, PPC32::LHZ, PPC32::LWZ, PPC32::LFS, PPC32::LFD
};
unsigned OC = Opcode[getIdx(RC)];
MBB.insert(MI, addFrameReference(BuildMI(OC, 2, DestReg), FrameIdx));
return 1;
@ -80,7 +81,7 @@ int PowerPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
const TargetRegisterClass *RC) const {
MachineInstr *I;
if(RC == PowerPC::GPRCRegisterClass) {
if (RC == PowerPC::GPRCRegisterClass) {
I = BuildMI(PPC32::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
} else if (RC == PowerPC::FPRCRegisterClass) {
I = BuildMI(PPC32::FMR, 1, DestReg).addReg(SrcReg);
@ -121,10 +122,12 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineInstr *New;
if (Old->getOpcode() == PPC32::ADJCALLSTACKDOWN) {
New=BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(-Amount);
New = BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1)
.addSImm(-Amount);
} else {
assert(Old->getOpcode() == PPC32::ADJCALLSTACKUP);
New=BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(Amount);
New = BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1)
.addSImm(Amount);
}
// Replace the pseudo instruction with a new instruction...
@ -166,8 +169,9 @@ PowerPCRegisterInfo::eliminateFrameIndex(MachineFunction &MF,
}
void PowerPCRegisterInfo::processFunctionBeforeFrameFinalized(
MachineFunction &MF) const {
void
PowerPCRegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
const {
// Do Nothing
}
@ -193,11 +197,11 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
// Store the incoming LR so it is preserved across calls
MI= BuildMI(PPC32::MovePCtoLR, 0, PPC32::LR).addReg(PPC32::LR);
MI = BuildMI(PPC32::MovePCtoLR, 0, PPC32::LR).addReg(PPC32::LR);
MBB.insert(MBBI, MI);
MI= BuildMI(PPC32::MFSPR, 1, PPC32::R0).addImm(8);
MI = BuildMI(PPC32::MFSPR, 1, PPC32::R0).addImm(8);
MBB.insert(MBBI, MI);
MI= BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
MBB.insert(MBBI, MI);
}
@ -206,7 +210,7 @@ void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
// adjust stack pointer: r1 -= numbytes
if (NumBytes) {
MI= BuildMI(PPC32::STWU, 2, PPC32::R1).addImm(-NumBytes).addReg(PPC32::R1);
MI = BuildMI(PPC32::STWU, 2, PPC32::R1).addImm(-NumBytes).addReg(PPC32::R1);
MBB.insert(MBBI, MI);
}
}
@ -224,9 +228,7 @@ void PowerPCRegisterInfo::emitEpilogue(MachineFunction &MF,
// adjust stack pointer back: r1 += numbytes
if (NumBytes) {
MI =BuildMI(PPC32::ADDI, 2, PPC32::R1)
.addReg(PPC32::R1)
.addSImm(NumBytes);
MI =BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(NumBytes);
MBB.insert(MBBI, MI);
}
@ -239,7 +241,6 @@ void PowerPCRegisterInfo::emitEpilogue(MachineFunction &MF,
}
}
#include "PowerPCGenRegisterInfo.inc"
const TargetRegisterClass*