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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-18 12:29:21 +00:00
Remove some (LARGE) abandoned code for the release. If this is ever needed
again in the future, it can be resurrected out of CVS git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15112 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -13,8 +13,7 @@ include $(LEVEL)/Makefile.common
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# Make sure that tblgen is run, first thing.
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$(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
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X86GenRegisterInfo.inc X86GenInstrNames.inc \
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X86GenInstrInfo.inc X86GenSimpInstrSelector.inc \
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X86GenInstrSelector.inc
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X86GenInstrInfo.inc X86GenInstrSelector.inc
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X86GenRegisterNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@ -41,10 +40,6 @@ X86GenInstrInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
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@echo "Building X86.td instruction information with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
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X86GenSimpInstrSelector.inc:: $(SourceDir)/X86InstrSel.td $(TBLGEN)
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@echo "Building X86.td simple instruction selector with tblgen"
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$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-simp-instr-sel -o $@
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X86GenInstrSelector.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
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$(SourceDir)/../Target.td $(TBLGEN)
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@echo "Building X86.td instruction selector with tblgen"
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@ -29,12 +29,6 @@ class IntrinsicLowering;
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///
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FunctionPass *createX86SimpleInstructionSelector(TargetMachine &TM);
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/// createX86ReallySimpleInstructionSelector - This pass converts an LLVM
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/// function into a machine code representation in an even simpler fashion
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/// than above.
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///
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FunctionPass *createX86ReallySimpleInstructionSelector(TargetMachine &TM);
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/// createX86PatternInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation using pattern matching and a machine
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/// description file.
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File diff suppressed because it is too large
Load Diff
@ -34,8 +34,6 @@ namespace {
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cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
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cl::desc("Disable the X86 asm printer, for use "
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"when profiling the code generator."));
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cl::opt<bool> NoSimpleISel("disable-simple-isel", cl::init(true),
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cl::desc("Use the hand coded 'simple' X86 instruction selector"));
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// Register the target.
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RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
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@ -85,10 +83,8 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM,
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// Make sure that no unreachable blocks are instruction selected.
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PM.add(createUnreachableBlockEliminationPass());
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if (NoPatternISel && NoSimpleISel)
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if (NoPatternISel)
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PM.add(createX86SimpleInstructionSelector(*this));
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else if (NoPatternISel)
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PM.add(createX86ReallySimpleInstructionSelector(*this));
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else
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PM.add(createX86PatternInstructionSelector(*this));
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