[fast-isel] Add support for selecting insertvalue.

rdar://10530851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146276 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2011-12-09 20:09:54 +00:00
parent 3c68acd202
commit cd462d055f
3 changed files with 198 additions and 0 deletions

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@ -361,6 +361,8 @@ private:
bool SelectExtractValue(const User *I);
bool SelectInsertValue(const User *I);
/// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine PHI

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@ -941,6 +941,105 @@ FastISel::SelectExtractValue(const User *U) {
return true;
}
bool
FastISel::SelectInsertValue(const User *U) {
const InsertValueInst *IVI = dyn_cast<InsertValueInst>(U);
if (!IVI)
return false;
// Only try to handle inserts of legal types. But also allow i16/i8/i1 because
// they're easy.
const Value *Val = IVI->getOperand(1);
Type *ValTy = Val->getType();
EVT ValVT = TLI.getValueType(ValTy, /*AllowUnknown=*/true);
if (!ValVT.isSimple())
return false;
MVT VT = ValVT.getSimpleVT();
if (!TLI.isTypeLegal(VT) && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
return false;
// Get the Val register.
unsigned ValReg = getRegForValue(Val);
if (ValReg == 0) return false;
const Value *Agg = IVI->getOperand(0);
Type *AggTy = Agg->getType();
// TODO: Is there a better way to do this? For each insertvalue we allocate
// a new set of virtual registers, which results in a large number of
// loads/stores from/to the stack that copies the aggregate all over the place
// and results in lots of spill code. I believe this is necessary to preserve
// SSA form, but maybe there's something we coul do to improve this.
// Get the Aggregate base register.
unsigned AggBaseReg;
DenseMap<const Value *, unsigned>::iterator I = FuncInfo.ValueMap.find(Agg);
if (I != FuncInfo.ValueMap.end())
AggBaseReg = I->second;
else if (isa<Instruction>(Agg))
AggBaseReg = FuncInfo.InitializeRegForValue(Agg);
else if (isa<UndefValue>(Agg))
// In this case we don't need to allocate a new set of register that will
// never be defined. Just copy Val into the proper result registers.
AggBaseReg = 0;
else
return false; // fast-isel can't handle aggregate constants at the moment
// Create result register(s).
unsigned ResultBaseReg = FuncInfo.CreateRegs(AggTy);
// Get the actual result register, which is an offset from the base register.
unsigned LinearIndex = ComputeLinearIndex(Agg->getType(), IVI->getIndices());
SmallVector<EVT, 4> AggValueVTs;
ComputeValueVTs(TLI, AggTy, AggValueVTs);
// Copy the beginning value(s) from the original aggregate.
unsigned SrcReg;
unsigned DestReg;
unsigned BaseRegOff = 0;
unsigned i = 0;
for (; i != LinearIndex; ++i) {
unsigned NRE = TLI.getNumRegisters(FuncInfo.Fn->getContext(),
AggValueVTs[i]);
for (unsigned NRI = 0; NRI != NRE; NRI++) {
if (AggBaseReg) {
SrcReg = AggBaseReg + BaseRegOff + NRI;
DestReg = ResultBaseReg + BaseRegOff + NRI;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
DestReg).addReg(SrcReg);
}
}
BaseRegOff += NRE;
}
// FIXME: Handle aggregate inserts. Haven't seen these in practice, but..
// Copy value(s) from the inserted value(s).
DestReg = ResultBaseReg + BaseRegOff;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
DestReg).addReg(ValReg);
++BaseRegOff;
++i;
// Copy remaining value(s) from the original aggregate.
if (AggBaseReg) {
for (unsigned NumAggValues = AggValueVTs.size(); i != NumAggValues; ++i) {
unsigned NRE = TLI.getNumRegisters(FuncInfo.Fn->getContext(),
AggValueVTs[i]);
for (unsigned NRI = 0; NRI != NRE; NRI++) {
SrcReg = AggBaseReg + BaseRegOff + NRI;
DestReg = ResultBaseReg + BaseRegOff + NRI;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
DestReg).addReg(SrcReg);
}
BaseRegOff += NRE;
}
}
UpdateValueMap(IVI, ResultBaseReg);
return true;
}
bool
FastISel::SelectOperator(const User *I, unsigned Opcode) {
switch (Opcode) {
@ -1048,6 +1147,9 @@ FastISel::SelectOperator(const User *I, unsigned Opcode) {
case Instruction::ExtractValue:
return SelectExtractValue(I);
case Instruction::InsertValue:
return SelectInsertValue(I);
case Instruction::PHI:
llvm_unreachable("FastISel shouldn't visit PHI nodes!");

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@ -0,0 +1,94 @@
; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB
@"\01L_OBJC_IMAGE_INFO" = internal constant [2 x i32] [i32 0, i32 16], section "__DATA, __objc_imageinfo, regular, no_dead_strip"
@llvm.used = appending global [1 x i8*] [i8* bitcast ([2 x i32]* @"\01L_OBJC_IMAGE_INFO" to i8*)], section "llvm.metadata"
define i32 @f1(i32 %return_in_finally) {
entry:
%retval = alloca i32, align 4
%return_in_finally.addr = alloca i32, align 4
%finally.for-eh = alloca i1
%cleanup.dest.slot = alloca i32
%exn.slot = alloca i8*
%ehselector.slot = alloca i32
store i32 %return_in_finally, i32* %return_in_finally.addr, align 4
store i1 false, i1* %finally.for-eh
%cleanup.dest.saved = load i32* %cleanup.dest.slot
%finally.shouldthrow = load i1* %finally.for-eh
br i1 %finally.shouldthrow, label %finally.rethrow, label %finally.cont
finally.rethrow: ; preds = %entry
invoke void @objc_exception_rethrow()
to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %finally.rethrow
unreachable
finally.cont: ; preds = %entry
store i32 %cleanup.dest.saved, i32* %cleanup.dest.slot
%0 = load i32* %retval
ret i32 %0
lpad: ; preds = %finally.rethrow
%1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*)
cleanup
%2 = extractvalue { i8*, i32 } %1, 0
store i8* %2, i8** %exn.slot
%3 = extractvalue { i8*, i32 } %1, 1
store i32 %3, i32* %ehselector.slot
%finally.endcatch = load i1* %finally.for-eh
br i1 %finally.endcatch, label %finally.endcatch1, label %finally.cleanup.cont
finally.endcatch1: ; preds = %lpad
invoke void @objc_end_catch()
to label %invoke.cont2 unwind label %terminate.lpad
invoke.cont2: ; preds = %finally.endcatch1
br label %finally.cleanup.cont
finally.cleanup.cont: ; preds = %invoke.cont2, %lpad
br label %eh.resume
eh.resume: ; preds = %finally.cleanup.cont
; ARM: eh.resume
; ARM: mvn r0, #0
; ARM: ldr r1, [sp, #84]
; ARM: ldr r2, [sp, #80]
; ARM: ldr r3, [sp, #72]
; ARM: str r0, [r3]
; ARM: str r1, [sp, #28]
; ARM: str r2, [sp, #24]
; THUMB: eh.resume
; THUMB: movw r0, #65535
; THUMB: movt r0, #65535
; THUMB: ldr r1, [sp, #80]
; THUMB: ldr r2, [sp, #76]
; THUMB: ldr r3, [sp, #68]
; THUMB: str r0, [r3]
; THUMB: str r1, [sp, #24]
; THUMB: str r2, [sp, #20]
%exn = load i8** %exn.slot
%sel = load i32* %ehselector.slot
%lpad.val = insertvalue { i8*, i32 } undef, i8* %exn, 0
%lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel, 1
resume { i8*, i32 } %lpad.val3
terminate.lpad: ; preds = %finally.endcatch1
%4 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*)
catch i8* null
call void @abort() noreturn nounwind
unreachable
}
declare i8* @objc_begin_catch(i8*)
declare void @objc_end_catch()
declare void @objc_exception_rethrow()
declare i32 @__objc_personality_v0(...)
declare void @abort()