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Add prologue/epilogue emission. Fix frame pointer handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -14,6 +14,7 @@
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#define DEBUG_TYPE "msp430-reg-info"
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#include "MSP430.h"
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#include "MSP430MachineFunctionInfo.h"
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#include "MSP430RegisterInfo.h"
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#include "MSP430TargetMachine.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@ -165,12 +166,14 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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unsigned BasePtr = (hasFP(MF) ? MSP430::FPW : MSP430::SPW);
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int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
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if (!hasFP(MF))
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Offset += MF.getFrameInfo()->getStackSize();
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// Skip the saved PC
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Offset += 2;
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if (!hasFP(MF))
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Offset += MF.getFrameInfo()->getStackSize();
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else
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Offset += 2; // Skip the saved FPW
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// Fold imm into offset
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Offset += MI.getOperand(i+1).getImm();
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@ -201,13 +204,140 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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MI.getOperand(i+1).ChangeToImmediate(Offset);
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}
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void
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MSP430RegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
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const {
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// Create a frame entry for the FPW register that must be saved.
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if (hasFP(MF)) {
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int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4);
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assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
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"Slot for FPW register must be last in order to be found!");
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FrameIdx = 0;
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}
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}
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void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
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// Nothing here yet
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MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MSP430MachineFunctionInfo *MSP430FI = MF.getInfo<MSP430MachineFunctionInfo>();
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc DL = (MBBI != MBB.end() ? MBBI->getDebugLoc() :
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DebugLoc::getUnknownLoc());
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// Get the number of bytes to allocate from the FrameInfo.
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uint64_t StackSize = MFI->getStackSize();
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uint64_t NumBytes = 0;
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if (hasFP(MF)) {
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// Calculate required stack adjustment
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uint64_t FrameSize = StackSize - 2;
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NumBytes = FrameSize - MSP430FI->getCalleeSavedFrameSize();
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// Get the offset of the stack slot for the EBP register... which is
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// guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
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// Update the frame offset adjustment.
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MFI->setOffsetAdjustment(-NumBytes);
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// Save FPW into the appropriate stack slot...
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BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
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.addReg(MSP430::FPW, /*isDef=*/false, /*isImp=*/false, /*isKill=*/true);
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// Update FPW with the new base value...
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BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
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.addReg(MSP430::SPW);
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// Mark the FramePtr as live-in in every block except the entry.
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for (MachineFunction::iterator I = next(MF.begin()), E = MF.end();
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I != E; ++I)
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I->addLiveIn(MSP430::FPW);
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} else
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NumBytes = StackSize - MSP430FI->getCalleeSavedFrameSize();
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// Skip the callee-saved push instructions.
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while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
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++MBBI;
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if (MBBI != MBB.end())
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DL = MBBI->getDebugLoc();
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if (NumBytes) { // adjust stack pointer: SPW -= numbytes
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// If there is an SUB16ri of SPW immediately before this instruction, merge
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// the two.
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//NumBytes -= mergeSPUpdates(MBB, MBBI, true);
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// If there is an ADD16ri or SUB16ri of SPW immediately after this
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// instruction, merge the two instructions.
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// mergeSPUpdatesDown(MBB, MBBI, &NumBytes);
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if (NumBytes) {
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MachineInstr *MI =
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BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW)
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.addReg(MSP430::SPW).addImm(NumBytes);
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// The SRW implicit def is dead.
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MI->getOperand(3).setIsDead();
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}
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}
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}
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void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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// Nothing here yet
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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MSP430MachineFunctionInfo *MSP430FI = MF.getInfo<MSP430MachineFunctionInfo>();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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unsigned RetOpcode = MBBI->getOpcode();
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DebugLoc DL = MBBI->getDebugLoc();
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switch (RetOpcode) {
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case MSP430::RET: break; // These are ok
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default:
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assert(0 && "Can only insert epilog into returning blocks");
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}
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// Get the number of bytes to allocate from the FrameInfo
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uint64_t StackSize = MFI->getStackSize();
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unsigned CSSize = MSP430FI->getCalleeSavedFrameSize();
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uint64_t NumBytes = 0;
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if (hasFP(MF)) {
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// Calculate required stack adjustment
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uint64_t FrameSize = StackSize - 2;
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NumBytes = FrameSize - CSSize;
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// pop FPW.
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BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW);
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} else
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NumBytes = StackSize - CSSize;
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// Skip the callee-saved pop instructions.
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MachineBasicBlock::iterator LastCSPop = MBBI;
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while (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator PI = prior(MBBI);
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unsigned Opc = PI->getOpcode();
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if (Opc != MSP430::POP16r && !PI->getDesc().isTerminator())
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break;
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--MBBI;
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}
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DL = MBBI->getDebugLoc();
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// If there is an ADD16ri or SUB16ri of SPW immediately before this
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// instruction, merge the two instructions.
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//if (NumBytes || MFI->hasVarSizedObjects())
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// mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
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if (MFI->hasVarSizedObjects()) {
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assert(0 && "Not implemented yet!");
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} else {
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// adjust stack pointer back: SPW += numbytes
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if (NumBytes) {
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MachineInstr *MI =
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BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SPW)
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.addReg(MSP430::SPW).addImm(NumBytes);
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// The SRW implicit def is dead.
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MI->getOperand(3).setIsDead();
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}
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}
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}
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unsigned MSP430RegisterInfo::getRARegister() const {
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@ -55,6 +55,8 @@ public:
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void emitPrologue(MachineFunction &MF) const;
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void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
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// Debug information queries.
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unsigned getRARegister() const;
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unsigned getFrameRegister(MachineFunction &MF) const;
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@ -41,7 +41,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Module &M,
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// FIXME: Check TargetData string.
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DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"),
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InstrInfo(*this), TLInfo(*this),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) { }
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FrameInfo(TargetFrameInfo::StackGrowsDown, 2, -2) { }
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const TargetAsmInfo *MSP430TargetMachine::createTargetAsmInfo() const {
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return new MSP430TargetAsmInfo(*this);
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