6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

in the case where an instruction only has one implementation

Browse Source 
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-09-06 22:11:18 +00:00
parent a008e8ac73
commit ce4a3355d9
3 changed files with 48 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@@ -83,7 +83,8 @@ private:
bool MatchInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCInst &Inst) {
if (MatchInstructionImpl(Operands, Inst) == Match_Success)
unsigned ErrorInfo;
if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success)
return false;
// FIXME: We should give nicer diagnostics about the exact failure.