Encode condition code for Thumb1 conditional branch instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120865 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-04 00:20:40 +00:00
parent b7bbd46122
commit ceab50198e

View File

@ -475,10 +475,13 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
// FIXME: should be able to write a pattern for ARMBrcond, but can't use
// a two-value operand where a dag node expects two operands. :(
let isBranch = 1, isTerminator = 1 in
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), IIC_Br,
"b$cc\t$target",
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$p), IIC_Br,
"b${p}\t$target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>,
T1Encoding<{1,1,0,1,?,?}>;
T1Encoding<{1,1,0,1,?,?}> {
bits<4> p;
let Inst{11-8} = p;
}
// Compare and branch on zero / non-zero
let isBranch = 1, isTerminator = 1 in {