mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-05 01:31:05 +00:00
Add a space between // and the comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34244 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
13a3cee131
commit
cf8270a994
@ -2935,9 +2935,9 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
|
||||
bool isSRet = FTy->paramHasAttr(j, FunctionType::StructRetAttribute);
|
||||
unsigned OriginalAlignment =
|
||||
getTargetData()->getTypeAlignmentABI(I->getType());
|
||||
//Flags[31:27]-> OriginalAlignment
|
||||
//Flags[2] -> isSRet
|
||||
//Flags[1] -> isInReg
|
||||
// Flags[31:27] -> OriginalAlignment
|
||||
// Flags[2] -> isSRet
|
||||
// Flags[1] -> isInReg
|
||||
unsigned Flags = (isInReg << 1) | (isSRet << 2) | (OriginalAlignment << 27);
|
||||
|
||||
switch (getTypeAction(VT)) {
|
||||
@ -2959,7 +2959,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
|
||||
unsigned NumVals = getNumElements(VT);
|
||||
for (unsigned i = 0; i != NumVals; ++i) {
|
||||
RetVals.push_back(NVT);
|
||||
//if it isn't first piece, alignment must be 1
|
||||
// if it isn't first piece, alignment must be 1
|
||||
if (i == 1) Flags = (Flags & 0x07ffffff) | (1 << 27);
|
||||
Ops.push_back(DAG.getConstant(Flags, MVT::i32));
|
||||
}
|
||||
@ -3067,7 +3067,7 @@ static void ExpandScalarCallArgs(MVT::ValueType VT, SDOperand Arg,
|
||||
bool isFirst = true) {
|
||||
|
||||
if (TLI.getTypeAction(VT) != TargetLowering::Expand) {
|
||||
//if it isn't first piece, alignment must be 1
|
||||
// if it isn't first piece, alignment must be 1
|
||||
if (!isFirst)
|
||||
Flags = (Flags & 0x07ffffff) | (1 << 27);
|
||||
Ops.push_back(Arg);
|
||||
@ -3121,10 +3121,10 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
|
||||
bool isSRet = Args[i].isSRet;
|
||||
unsigned OriginalAlignment =
|
||||
getTargetData()->getTypeAlignmentABI(Args[i].Ty);
|
||||
//Flags[31:27]-> OriginalAlignment
|
||||
//Flags[2] -> isSRet
|
||||
//Flags[1] -> isInReg
|
||||
//Flags[0] -> isSigned
|
||||
// Flags[31:27] -> OriginalAlignment
|
||||
// Flags[2] -> isSRet
|
||||
// Flags[1] -> isInReg
|
||||
// Flags[0] -> isSigned
|
||||
unsigned Flags = (isSRet << 2) | (isInReg << 1) | isSigned |
|
||||
(OriginalAlignment << 27);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user