Fix rematerialization into physical registers.

r182872 introduced a bug in how the register-coalescer's rematerialization
handled defining a physical register. It relied on the output of the
coalescer's setRegisters method to determine whether the replacement
instruction needed an implicit-def. However, this value isn't necessarily the
same as the CopyMI's actual destination register which is what the rest of the
basic-block expects us to be defining.

The commit changes the rematerializer to use the actual register attached to
CopyMI in its decision.

This will be tested soon by an X86 patch which moves everything to using
MOV32r0 instead of other sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182925 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2013-05-30 12:30:50 +00:00
parent d5c52f1d76
commit d01fb9e212

View File

@ -762,6 +762,7 @@ bool RegisterCoalescer::reMaterializeTrivialDef(CoalescerPair &CP,
return false;
// Only support subregister destinations when the def is read-undef.
MachineOperand &DstOperand = CopyMI->getOperand(0);
unsigned CopyDstReg = DstOperand.getReg();
if (DstOperand.getSubReg() && !DstOperand.isUndef())
return false;
@ -837,12 +838,12 @@ bool RegisterCoalescer::reMaterializeTrivialDef(CoalescerPair &CP,
NewMI->getOperand(0).setSubReg(
TRI->composeSubRegIndices(SrcIdx, DefMI->getOperand(0).getSubReg()));
}
} else if (NewMI->getOperand(0).getReg() != DstReg) {
} else if (NewMI->getOperand(0).getReg() != CopyDstReg) {
// The New instruction may be defining a sub-register of what's actually
// been asked for. If so it must implicitly define the whole thing.
assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
"Only expect virtual or physical registers in remat");
NewMI->addOperand(MachineOperand::CreateReg(DstReg,
NewMI->addOperand(MachineOperand::CreateReg(CopyDstReg,
true /*IsDef*/,
true /*IsImp*/,
false /*IsKill*/));