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Introduce a new function to lower 256-bit vectors which are not
direclty supported and should be promoted and handled by smaller shuffles git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135726 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5376,6 +5376,13 @@ static SDValue getVZextMovL(EVT VT, EVT OpVT,
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OpVT, SrcOp)));
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}
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/// LowerVECTOR_SHUFFLE_256 - Handle all 256-bit wide vectors shuffles
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/// which could not be matched by any known target speficic shuffle
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static SDValue
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LowerVECTOR_SHUFFLE_256(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
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return SDValue();
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}
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/// LowerVECTOR_SHUFFLE_128v4 - Handle all 128-bit wide vectors with
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/// 4 elements, and match them with several different shuffle types.
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static SDValue
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@ -6101,6 +6108,9 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
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if (NumElems == 4 && VT.getSizeInBits() == 128)
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return LowerVECTOR_SHUFFLE_128v4(SVOp, DAG);
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//===--------------------------------------------------------------------===//
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// Custom lower or generate target specific nodes for 256-bit shuffles.
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// Handle VPERMIL permutations
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if (isVPERMILMask(M, VT)) {
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unsigned TargetMask = getShuffleVPERMILImmediate(SVOp);
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@ -6108,6 +6118,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
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return getTargetShuffleNode(X86ISD::VPERMIL, dl, VT, V1, TargetMask, DAG);
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}
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// Handle general 256-bit shuffles
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if (VT.is256BitVector())
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return LowerVECTOR_SHUFFLE_256(SVOp, DAG);
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return SDValue();
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}
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