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[RegisterCoalescer] Make sure each live-range has only one component, as
demanded by the machine verifier. After shrinking a live-range to its uses, it is possible to create several smaller live-ranges. When this happens, shrinkToUses returns true and we need to split the different components into their own live-ranges. The problem does not reproduce on any in-tree target but Jonas Paulsson <jonas.paulsson@ericsson.com>, who reported the problem, checked that this patch fixes the issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236658 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -224,6 +224,32 @@ namespace {
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/// Dst, we can drop \p Copy.
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bool applyTerminalRule(const MachineInstr &Copy) const;
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/// Check whether or not \p LI is composed by multiple connected
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/// components and if that is the case, fix that.
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void splitNewRanges(LiveInterval *LI) {
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ConnectedVNInfoEqClasses ConEQ(*LIS);
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unsigned NumComps = ConEQ.Classify(LI);
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if (NumComps <= 1)
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return;
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SmallVector<LiveInterval*, 8> NewComps(1, LI);
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for (unsigned i = 1; i != NumComps; ++i) {
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unsigned VReg = MRI->createVirtualRegister(MRI->getRegClass(LI->reg));
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NewComps.push_back(&LIS->createEmptyInterval(VReg));
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}
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ConEQ.Distribute(&NewComps[0], *MRI);
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}
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/// Wrapper method for \see LiveIntervals::shrinkToUses.
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/// This method does the proper fixing of the live-ranges when the afore
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/// mentioned method returns true.
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void shrinkToUses(LiveInterval *LI,
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SmallVectorImpl<MachineInstr * > *Dead = nullptr) {
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if (LIS->shrinkToUses(LI, Dead))
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// We may have created multiple connected components, split them.
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splitNewRanges(LI);
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}
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public:
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static char ID; ///< Class identification, replacement for typeinfo
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RegisterCoalescer() : MachineFunctionPass(ID) {
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@ -556,7 +582,7 @@ bool RegisterCoalescer::adjustCopiesBackFrom(const CoalescerPair &CP,
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// will also add the isKill marker.
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CopyMI->substituteRegister(IntA.reg, IntB.reg, 0, *TRI);
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if (AS->end == CopyIdx)
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LIS->shrinkToUses(&IntA);
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shrinkToUses(&IntA);
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++numExtends;
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return true;
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@ -1046,7 +1072,7 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
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++NumReMats;
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// The source interval can become smaller because we removed a use.
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LIS->shrinkToUses(&SrcInt, &DeadDefs);
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shrinkToUses(&SrcInt, &DeadDefs);
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if (!DeadDefs.empty()) {
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// If the virtual SrcReg is completely eliminated, update all DBG_VALUEs
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// to describe DstReg instead.
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@ -1427,7 +1453,7 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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}
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if (ShrinkMainRange) {
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LiveInterval &LI = LIS->getInterval(CP.getDstReg());
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LIS->shrinkToUses(&LI);
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shrinkToUses(&LI);
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}
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// SrcReg is guaranteed to be the register whose live interval that is
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@ -2635,7 +2661,7 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
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LHSVals.eraseInstrs(ErasedInstrs, ShrinkRegs);
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RHSVals.eraseInstrs(ErasedInstrs, ShrinkRegs);
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while (!ShrinkRegs.empty())
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LIS->shrinkToUses(&LIS->getInterval(ShrinkRegs.pop_back_val()));
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shrinkToUses(&LIS->getInterval(ShrinkRegs.pop_back_val()));
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// Join RHS into LHS.
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LHS.join(RHS, LHSVals.getAssignments(), RHSVals.getAssignments(), NewVNInfo);
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