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Take advantage of our knowledge of 2-address X86 instructions and
register-allocated them appropriately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4976 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -38,6 +38,9 @@ namespace {
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// Maps physical register to their register classes
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std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
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// Made to combat the incorrect allocation of r2 = add r1, r1
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std::map<unsigned, unsigned> VirtReg2PhysRegMap;
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// Maps RegClass => which index we can take a register from. Since this is a
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// simple register allocator, when we need a register of a certain class, we
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@ -225,17 +228,30 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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DEBUG(std::cerr << "const\n");
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} else if (op.isVirtualRegister()) {
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virtualReg = (unsigned) op.getAllocatedRegNum();
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// save register to stack if it's a def
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DEBUG(std::cerr << "op: " << op << "\n");
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DEBUG(std::cerr << "\t inst[" << i << "]: ";
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MI->print(std::cerr, TM));
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if (op.opIsDef()) {
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physReg = getFreeReg(virtualReg);
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MachineBasicBlock::iterator J = I;
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J = saveVirtRegToStack(++J, virtualReg, physReg);
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I = --J;
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// make sure the same virtual register maps to the same physical
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// register in any given instruction
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if (VirtReg2PhysRegMap.find(virtualReg) != VirtReg2PhysRegMap.end()) {
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physReg = VirtReg2PhysRegMap[virtualReg];
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} else {
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I = moveUseToReg(I, virtualReg, physReg);
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if (op.opIsDef()) {
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if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
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// must be same register number as the first operand
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// This maps a = b + c into b += c, and saves b into a's spot
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physReg = (unsigned) MI->getOperand(1).getAllocatedRegNum();
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} else {
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physReg = getFreeReg(virtualReg);
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}
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MachineBasicBlock::iterator J = I;
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J = saveVirtRegToStack(++J, virtualReg, physReg);
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I = --J;
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} else {
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I = moveUseToReg(I, virtualReg, physReg);
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}
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VirtReg2PhysRegMap[virtualReg] = physReg;
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}
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MI->SetMachineOperandReg(i, physReg);
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DEBUG(std::cerr << "virt: " << virtualReg <<
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@ -244,6 +260,7 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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}
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clearAllRegs();
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VirtReg2PhysRegMap.clear();
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}
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}
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