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synced 2025-02-14 17:34:41 +00:00
Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes dynamically when they are needed. The local-liveness change is due to a trivial scheduling change where the scheduler arbitrary decision differently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59273 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -95,7 +95,6 @@ namespace llvm {
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private:
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SDNode *Node; // Representative node.
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public:
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SmallVector<SDNode*,4> FlaggedNodes;// All nodes flagged to Node.
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SUnit *OrigNode; // If not this, the node from which
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// this node was cloned.
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@ -1308,6 +1308,15 @@ public:
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SDVTList X = { ValueList, NumValues };
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return X;
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};
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/// getFlaggedNode - If this node has a flag operand, return the node
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/// to which the flag operand points. Otherwise return NULL.
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SDNode *getFlaggedNode() const {
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if (getNumOperands() != 0 &&
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getOperand(getNumOperands()-1).getValueType() == MVT::Flag)
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return getOperand(getNumOperands()-1).getNode();
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return 0;
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}
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/// getNumValues - Return the number of values defined/returned by this
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/// operator.
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@ -60,7 +60,6 @@ static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
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SUnit *ScheduleDAG::Clone(SUnit *Old) {
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SUnit *SU = NewSUnit(Old->getNode());
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SU->OrigNode = Old->OrigNode;
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SU->FlaggedNodes = Old->FlaggedNodes;
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SU->Latency = Old->Latency;
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SU->isTwoAddress = Old->isTwoAddress;
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SU->isCommutable = Old->isCommutable;
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@ -99,23 +98,19 @@ void ScheduleDAG::BuildSchedUnits() {
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// nodes. Nodes can have at most one flag input and one flag output. Flags
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// are required the be the last operand and result of a node.
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// Scan up, adding flagged preds to FlaggedNodes.
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// Scan up to find flagged preds.
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SDNode *N = NI;
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if (N->getNumOperands() &&
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N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Flag) {
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do {
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N = N->getOperand(N->getNumOperands()-1).getNode();
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NodeSUnit->FlaggedNodes.push_back(N);
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assert(N->getNodeId() == -1 && "Node already inserted!");
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N->setNodeId(NodeSUnit->NodeNum);
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} while (N->getNumOperands() &&
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N->getOperand(N->getNumOperands()-1).getValueType()== MVT::Flag);
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std::reverse(NodeSUnit->FlaggedNodes.begin(),
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NodeSUnit->FlaggedNodes.end());
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}
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// Scan down, adding this node and any flagged succs to FlaggedNodes if they
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// have a user of the flag operand.
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// Scan down to find any flagged succs.
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N = NI;
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while (N->getValueType(N->getNumValues()-1) == MVT::Flag) {
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SDValue FlagVal(N, N->getNumValues()-1);
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@ -126,7 +121,6 @@ void ScheduleDAG::BuildSchedUnits() {
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UI != E; ++UI)
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if (FlagVal.isOperandOf(*UI)) {
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HasFlagUse = true;
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NodeSUnit->FlaggedNodes.push_back(N);
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assert(N->getNodeId() == -1 && "Node already inserted!");
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N->setNodeId(NodeSUnit->NodeNum);
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N = *UI;
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@ -135,8 +129,9 @@ void ScheduleDAG::BuildSchedUnits() {
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if (!HasFlagUse) break;
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}
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// Now all flagged nodes are in FlaggedNodes and N is the bottom-most node.
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// Update the SUnit
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// If there are flag operands involved, N is now the bottom-most node
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// of the sequence of nodes that are flagged together.
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// Update the SUnit.
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NodeSUnit->setNode(N);
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assert(N->getNodeId() == -1 && "Node already inserted!");
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N->setNodeId(NodeSUnit->NodeNum);
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@ -163,11 +158,7 @@ void ScheduleDAG::BuildSchedUnits() {
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}
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// Find all predecessors and successors of the group.
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// Temporarily add N to make code simpler.
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SU->FlaggedNodes.push_back(MainNode);
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for (unsigned n = 0, e = SU->FlaggedNodes.size(); n != e; ++n) {
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SDNode *N = SU->FlaggedNodes[n];
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for (SDNode *N = SU->getNode(); N; N = N->getFlaggedNode()) {
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if (N->isMachineOpcode() &&
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TII->get(N->getMachineOpcode()).getImplicitDefs() &&
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CountResults(N) > TII->get(N->getMachineOpcode()).getNumDefs())
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@ -191,9 +182,6 @@ void ScheduleDAG::BuildSchedUnits() {
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SU->addPred(OpSU, isChain, false, PhysReg, Cost);
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}
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}
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// Remove MainNode from FlaggedNodes again.
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SU->FlaggedNodes.pop_back();
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}
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}
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@ -209,17 +197,9 @@ void ScheduleDAG::ComputeLatency(SUnit *SU) {
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}
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SU->Latency = 0;
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if (SU->getNode()->isMachineOpcode()) {
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unsigned SchedClass = TII->get(SU->getNode()->getMachineOpcode()).getSchedClass();
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const InstrStage *S = InstrItins.begin(SchedClass);
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const InstrStage *E = InstrItins.end(SchedClass);
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for (; S != E; ++S)
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SU->Latency += S->Cycles;
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}
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for (unsigned i = 0, e = SU->FlaggedNodes.size(); i != e; ++i) {
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SDNode *FNode = SU->FlaggedNodes[i];
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if (FNode->isMachineOpcode()) {
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unsigned SchedClass = TII->get(FNode->getMachineOpcode()).getSchedClass();
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for (SDNode *N = SU->getNode(); N; N = N->getFlaggedNode()) {
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if (N->isMachineOpcode()) {
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unsigned SchedClass = TII->get(N->getMachineOpcode()).getSchedClass();
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const InstrStage *S = InstrItins.begin(SchedClass);
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const InstrStage *E = InstrItins.end(SchedClass);
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for (; S != E; ++S)
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@ -397,17 +377,19 @@ void ScheduleDAG::Run() {
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/// a group of nodes flagged together.
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void SUnit::dump(const SelectionDAG *G) const {
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cerr << "SU(" << NodeNum << "): ";
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if (Node)
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Node->dump(G);
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if (getNode())
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getNode()->dump(G);
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else
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cerr << "CROSS RC COPY ";
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cerr << "\n";
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if (FlaggedNodes.size() != 0) {
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for (unsigned i = 0, e = FlaggedNodes.size(); i != e; i++) {
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cerr << " ";
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FlaggedNodes[i]->dump(G);
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cerr << "\n";
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}
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SmallVector<SDNode *, 4> FlaggedNodes;
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for (SDNode *N = getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
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FlaggedNodes.push_back(N);
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while (!FlaggedNodes.empty()) {
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cerr << " ";
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FlaggedNodes.back()->dump(G);
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cerr << "\n";
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FlaggedNodes.pop_back();
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}
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}
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@ -684,8 +684,13 @@ MachineBasicBlock *ScheduleDAG::EmitSchedule() {
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EmitNoop();
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continue;
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}
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for (unsigned j = 0, ee = SU->FlaggedNodes.size(); j != ee; ++j)
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EmitNode(SU->FlaggedNodes[j], SU->OrigNode != SU, VRBaseMap);
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SmallVector<SDNode *, 4> FlaggedNodes;
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for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
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FlaggedNodes.push_back(N);
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while (!FlaggedNodes.empty()) {
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EmitNode(FlaggedNodes.back(), SU->OrigNode != SU, VRBaseMap);
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FlaggedNodes.pop_back();
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}
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if (!SU->getNode())
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EmitCrossRCCopy(SU, CopyVRBaseMap);
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else
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@ -221,7 +221,7 @@ bool ScheduleDAGFast::RemovePred(SUnit *M, SUnit *N,
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/// CopyAndMoveSuccessors - Clone the specified node and move its scheduled
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/// successors to the newly created node.
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SUnit *ScheduleDAGFast::CopyAndMoveSuccessors(SUnit *SU) {
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if (SU->FlaggedNodes.size())
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if (SU->getNode()->getFlaggedNode())
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return NULL;
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SDNode *N = SU->getNode();
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@ -485,9 +485,8 @@ bool ScheduleDAGFast::DelayForLiveRegsBottomUp(SUnit *SU,
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}
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}
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for (unsigned i = 0, e = SU->FlaggedNodes.size()+1; i != e; ++i) {
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SDNode *Node = (i == 0) ? SU->getNode() : SU->FlaggedNodes[i-1];
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if (!Node || !Node->isMachineOpcode())
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for (SDNode *Node = SU->getNode(); Node; Node = Node->getFlaggedNode()) {
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if (!Node->isMachineOpcode())
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continue;
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const TargetInstrDesc &TID = TII->get(Node->getMachineOpcode());
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if (!TID.ImplicitDefs)
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@ -205,9 +205,11 @@ void ScheduleDAGList::ListScheduleTopDown() {
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// If this is a pseudo op, like copyfromreg, look to see if there is a
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// real target node flagged to it. If so, use the target node.
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for (unsigned i = 0, e = CurSUnit->FlaggedNodes.size();
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!FoundNode->isMachineOpcode() && i != e; ++i)
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FoundNode = CurSUnit->FlaggedNodes[i];
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while (!FoundNode->isMachineOpcode()) {
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SDNode *N = FoundNode->getFlaggedNode();
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if (!N) break;
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FoundNode = N;
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}
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HazardRecognizer::HazardType HT = HazardRec->getHazardType(FoundNode);
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if (HT == HazardRecognizer::NoHazard) {
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@ -626,7 +626,7 @@ void ScheduleDAGRRList::BacktrackBottomUp(SUnit *SU, unsigned BtCycle,
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/// CopyAndMoveSuccessors - Clone the specified node and move its scheduled
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/// successors to the newly created node.
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SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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if (SU->FlaggedNodes.size())
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if (SU->getNode()->getFlaggedNode())
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return NULL;
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SDNode *N = SU->getNode();
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@ -903,9 +903,8 @@ bool ScheduleDAGRRList::DelayForLiveRegsBottomUp(SUnit *SU,
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}
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}
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for (unsigned i = 0, e = SU->FlaggedNodes.size()+1; i != e; ++i) {
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SDNode *Node = (i == 0) ? SU->getNode() : SU->FlaggedNodes[i-1];
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if (!Node || !Node->isMachineOpcode())
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for (SDNode *Node = SU->getNode(); Node; Node = Node->getFlaggedNode()) {
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if (!Node->isMachineOpcode())
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continue;
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const TargetInstrDesc &TID = TII->get(Node->getMachineOpcode());
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if (!TID.ImplicitDefs)
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@ -1736,7 +1735,7 @@ void BURegReductionPriorityQueue::AddPseudoTwoAddrDeps() {
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continue;
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SDNode *Node = SU->getNode();
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if (!Node || !Node->isMachineOpcode() || SU->FlaggedNodes.size() > 0)
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if (!Node || !Node->isMachineOpcode() || SU->getNode()->getFlaggedNode())
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continue;
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unsigned Opc = Node->getMachineOpcode();
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@ -433,16 +433,19 @@ std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU,
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const ScheduleDAG *G) {
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std::string Op;
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for (unsigned i = 0; i < SU->FlaggedNodes.size(); ++i) {
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Op += DOTGraphTraits<SelectionDAG*>::getNodeLabel(SU->FlaggedNodes[i],
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G->DAG) + "\n";
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if (!SU->getNode())
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Op = "<CROSS RC COPY>";
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else {
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SmallVector<SDNode *, 4> FlaggedNodes;
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for (SDNode *N = SU->getNode(); N; N = N->getFlaggedNode())
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FlaggedNodes.push_back(N);
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while (!FlaggedNodes.empty()) {
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Op += DOTGraphTraits<SelectionDAG*>::getNodeLabel(FlaggedNodes.back(),
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G->DAG) + "\n";
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FlaggedNodes.pop_back();
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}
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}
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if (SU->getNode())
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Op += DOTGraphTraits<SelectionDAG*>::getNodeLabel(SU->getNode(), G->DAG);
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else
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Op += "<CROSS RC COPY>";
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return Op;
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}
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@ -1,4 +1,4 @@
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; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %esi}
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; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %edx}
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; Local regalloc shouldn't assume that both the uses of the
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; sub instruction are kills, because one of them is tied
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