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Use new MachineInstr mayLoadOrStore() API.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237965 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2015-05-21 21:59:57 +00:00
parent 3ad083f2cb
commit d525214b96
2 changed files with 3 additions and 5 deletions
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2
lib/Target/AArch64/AArch64A53Fix835769.cpp
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@ -48,7 +48,7 @@ static bool isFirstInstructionInSequence(MachineInstr *MI) {
case AArch64::PRFUMi:
return true;
default:
return (MI->mayLoad() || MI->mayStore());
return MI->mayLoadOrStore();
}
}

6
lib/Target/AArch64/AArch64InstrInfo.cpp
View File

@ -617,10 +617,8 @@ AArch64InstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa,
int OffsetA = 0, OffsetB = 0;
int WidthA = 0, WidthB = 0;
assert(MIa && (MIa->mayLoad() || MIa->mayStore()) &&
"MIa must be a store or a load");
assert(MIb && (MIb->mayLoad() || MIb->mayStore()) &&
"MIb must be a store or a load");
assert(MIa && MIa->mayLoadOrStore() && "MIa must be a load or store.");
assert(MIb && MIb->mayLoadOrStore() && "MIb must be a load or store.");
if (MIa->hasUnmodeledSideEffects() || MIb->hasUnmodeledSideEffects() ||
MIa->hasOrderedMemoryRef() || MIb->hasOrderedMemoryRef())