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Preserve <undef> flags in ARMExpandPseudo.
This probably mostly shows up in bugpoint-generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158527 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -459,22 +459,23 @@ void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) {
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MIB.addOperand(MI.getOperand(OpIdx++));
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MIB.addOperand(MI.getOperand(OpIdx++));
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bool SrcIsKill = MI.getOperand(OpIdx).isKill();
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bool SrcIsKill = MI.getOperand(OpIdx).isKill();
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bool SrcIsUndef = MI.getOperand(OpIdx).isUndef();
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unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
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unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
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unsigned D0, D1, D2, D3;
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unsigned D0, D1, D2, D3;
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GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
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GetDSubRegs(SrcReg, RegSpc, TRI, D0, D1, D2, D3);
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MIB.addReg(D0);
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MIB.addReg(D0, getUndefRegState(SrcIsUndef));
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if (NumRegs > 1 && TableEntry->copyAllListRegs)
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if (NumRegs > 1 && TableEntry->copyAllListRegs)
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MIB.addReg(D1);
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MIB.addReg(D1, getUndefRegState(SrcIsUndef));
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if (NumRegs > 2 && TableEntry->copyAllListRegs)
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if (NumRegs > 2 && TableEntry->copyAllListRegs)
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MIB.addReg(D2);
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MIB.addReg(D2, getUndefRegState(SrcIsUndef));
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if (NumRegs > 3 && TableEntry->copyAllListRegs)
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if (NumRegs > 3 && TableEntry->copyAllListRegs)
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MIB.addReg(D3);
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MIB.addReg(D3, getUndefRegState(SrcIsUndef));
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// Copy the predicate operands.
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// Copy the predicate operands.
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MIB.addOperand(MI.getOperand(OpIdx++));
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MIB.addOperand(MI.getOperand(OpIdx++));
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MIB.addOperand(MI.getOperand(OpIdx++));
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MIB.addOperand(MI.getOperand(OpIdx++));
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if (SrcIsKill) // Add an implicit kill for the super-reg.
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if (SrcIsKill && !SrcIsUndef) // Add an implicit kill for the super-reg.
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MIB->addRegisterKilled(SrcReg, TRI, true);
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MIB->addRegisterKilled(SrcReg, TRI, true);
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TransferImpOps(MI, MIB, MIB);
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TransferImpOps(MI, MIB, MIB);
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@ -60,8 +60,16 @@ for.end: ; preds = %entry
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ret void
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ret void
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}
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}
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; Check that pseudo-expansion preserves <undef> flags.
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define void @foo3(i8* %p) nounwind ssp {
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entry:
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tail call void @llvm.arm.neon.vst2.v4f32(i8* %p, <4 x float> undef, <4 x float> undef, i32 4)
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ret void
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}
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declare arm_aapcs_vfpcc void @bar(i8*, float, float, float)
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declare arm_aapcs_vfpcc void @bar(i8*, float, float, float)
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declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
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declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
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declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind
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!0 = metadata !{metadata !"omnipotent char", metadata !1}
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!0 = metadata !{metadata !"omnipotent char", metadata !1}
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!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
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!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
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