mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-03-03 14:31:10 +00:00
Approved by Chris
$ svn merge -c 113894 https://llvm.org/svn/llvm-project/llvm/trunk --- Merging r113894 into '.': U test/MC/AsmParser/X86/x86_instructions.s U lib/Target/X86/AsmParser/X86AsmParser.cpp Log: add a terrible hack to allow out with dx is parens, a gas bug. This fixes PR8114 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_28@113896 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
139d4669f1
commit
d654cf3977
@ -815,6 +815,20 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
|
||||
Operands.erase(Operands.begin() + 1);
|
||||
}
|
||||
|
||||
// FIXME: Hack to handle "out[bwl]? %al, (%dx)" -> "outb %al, %dx".
|
||||
if ((Name == "outb" || Name == "outw" || Name == "outl" || Name == "out") &&
|
||||
Operands.size() == 3) {
|
||||
X86Operand &Op = *(X86Operand*)Operands.back();
|
||||
if (Op.isMem() && Op.Mem.SegReg == 0 &&
|
||||
isa<MCConstantExpr>(Op.Mem.Disp) &&
|
||||
cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
|
||||
Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
|
||||
SMLoc Loc = Op.getEndLoc();
|
||||
Operands.back() = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
|
||||
delete &Op;
|
||||
}
|
||||
}
|
||||
|
||||
// FIXME: Hack to handle "f{mul*,add*,sub*,div*} $op, st(0)" the same as
|
||||
// "f{mul*,add*,sub*,div*} $op"
|
||||
if ((Name.startswith("fmul") || Name.startswith("fadd") ||
|
||||
|
@ -164,3 +164,12 @@ imul $12, %eax
|
||||
|
||||
// CHECK: imull %ecx, %eax
|
||||
imull %ecx, %eax
|
||||
|
||||
// PR8114
|
||||
// CHECK: outb %al, %dx
|
||||
// CHECK: outw %ax, %dx
|
||||
// CHECK: outl %eax, %dx
|
||||
|
||||
out %al, (%dx)
|
||||
out %ax, (%dx)
|
||||
outl %eax, (%dx)
|
||||
|
Loading…
x
Reference in New Issue
Block a user