Fix ARM handling of tBcc branch relaxation.

rdar://10069056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-06 01:08:19 +00:00
parent e80fba0e6c
commit d9a6e8978d
2 changed files with 19 additions and 3 deletions

View File

@ -146,11 +146,13 @@ bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
uint64_t Value,
const MCInstFragment *DF,
const MCAsmLayout &Layout) const {
// FIXME: This isn't correct for ARM. Just moving the "generic" logic
// into the targets for now.
// Relaxing tBcc to t2Bcc. tBcc has a signed 9-bit displacement with the
// low bit being an implied zero. There's an implied +4 offset for the
// branch, so we adjust the other way here to determine what's
// encodable.
//
// Relax if the value is too big for a (signed) i8.
return int64_t(Value) != int64_t(int8_t(Value));
return int64_t((Value - 4)>>1) != int64_t(int8_t((Value - 4)>>1));
}
void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {

View File

@ -0,0 +1,14 @@
@ RUN: llvm-mc -triple=thumbv7-apple-darwin -show-encoding %s -filetype=obj -o - | macho-dump --dump-section-data | FileCheck %s
ble Lfoo @ wide encoding
.space 258
Lfoo:
nop
ble Lbaz @ narrow encoding
.space 256
Lbaz:
@ CHECK: '_section_data', '40f38180
@ CHECK: 000000bf 7fdd