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SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them

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to denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos 2004-02-28 23:46:44 +00:00
parent 8e475b8cfd
commit da474adb21
4 changed files with 14 additions and 14 deletions
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8
lib/Target/X86/InstSelectSimple.cpp
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@ -1776,10 +1776,10 @@ void ISel::emitShiftOperation(MachineBasicBlock *MBB,
unsigned Class = getClass (ResultTy);
static const unsigned ConstantOperand[][4] = {
{ X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrri32 }, // SHR
{ X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrri32 }, // SAR
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 }, // SHL
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 }, // SAL = SHL
{ X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrr32i8 }, // SHR
{ X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrr32i8 }, // SAR
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 }, // SHL
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 }, // SAL = SHL
};
static const unsigned NonConstantOperand[][4] = {

8
lib/Target/X86/X86ISelSimple.cpp
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@ -1776,10 +1776,10 @@ void ISel::emitShiftOperation(MachineBasicBlock *MBB,
unsigned Class = getClass (ResultTy);
static const unsigned ConstantOperand[][4] = {
{ X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrri32 }, // SHR
{ X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrri32 }, // SAR
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 }, // SHL
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrri32 }, // SAL = SHL
{ X86::SHRri8, X86::SHRri16, X86::SHRri32, X86::SHRDrr32i8 }, // SHR
{ X86::SARri8, X86::SARri16, X86::SARri32, X86::SHRDrr32i8 }, // SAR
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 }, // SHL
{ X86::SHLri8, X86::SHLri16, X86::SHLri32, X86::SHLDrr32i8 }, // SAL = SHL
};
static const unsigned NonConstantOperand[][4] = {

8
lib/Target/X86/X86InstrInfo.td
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@ -441,13 +441,13 @@ def SARmi32 : Im32i8<"sar", 0xC1, MRM7m >; // [mem32] >>>=
def SHLDrrCL32 : I <"shld", 0xA5, MRMDestReg>, TB, UsesCL; // R32 <<= R32,R32 cl
def SHLDmrCL32 : I <"shld", 0xA5, MRMDestMem>, TB, UsesCL; // [mem32] <<= [mem32],R32 cl
def SHLDrri32 : Ii8 <"shld", 0xA4, MRMDestReg>, TB; // R32 <<= R32,R32 imm8
def SHLDmri32 : Ii8 <"shld", 0xA4, MRMDestMem>, TB; // [mem32] <<= [mem32],R32 imm8
def SHLDrr32i8 : Ii8 <"shld", 0xA4, MRMDestReg>, TB; // R32 <<= R32,R32 imm8
def SHLDmr32i8 : Ii8 <"shld", 0xA4, MRMDestMem>, TB; // [mem32] <<= [mem32],R32 imm8
def SHRDrrCL32 : I <"shrd", 0xAD, MRMDestReg>, TB, UsesCL; // R32 >>= R32,R32 cl
def SHRDmrCL32 : I <"shrd", 0xAD, MRMDestMem>, TB, UsesCL; // [mem32] >>= [mem32],R32 cl
def SHRDrri32 : Ii8 <"shrd", 0xAC, MRMDestReg>, TB; // R32 >>= R32,R32 imm8
def SHRDmri32 : Ii8 <"shrd", 0xAC, MRMDestMem>, TB; // [mem32] >>= [mem32],R32 imm8
def SHRDrr32i8 : Ii8 <"shrd", 0xAC, MRMDestReg>, TB; // R32 >>= R32,R32 imm8
def SHRDmr32i8 : Ii8 <"shrd", 0xAC, MRMDestMem>, TB; // [mem32] >>= [mem32],R32 imm8
// Arithmetic...

4
lib/Target/X86/X86RegisterInfo.cpp
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@ -223,9 +223,9 @@ bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
case X86::SARri16: NI = MakeMIInst(X86::SARmi16, FrameIndex, MI); break;
case X86::SARri32: NI = MakeMIInst(X86::SARmi32, FrameIndex, MI); break;
case X86::SHLDrrCL32:NI = MakeMRInst( X86::SHLDmrCL32,FrameIndex, MI);break;
case X86::SHLDrri32: NI = MakeMRIInst(X86::SHLDmri32, FrameIndex, MI);break;
case X86::SHLDrr32i8:NI = MakeMRIInst(X86::SHLDmr32i8,FrameIndex, MI);break;
case X86::SHRDrrCL32:NI = MakeMRInst( X86::SHRDmrCL32,FrameIndex, MI);break;
case X86::SHRDrri32: NI = MakeMRIInst(X86::SHRDmri32, FrameIndex, MI);break;
case X86::SHRDrr32i8:NI = MakeMRIInst(X86::SHRDmr32i8,FrameIndex, MI);break;
case X86::SETBr: NI = MakeMInst( X86::SETBm, FrameIndex, MI); break;
case X86::SETAEr: NI = MakeMInst( X86::SETAEm, FrameIndex, MI); break;
case X86::SETEr: NI = MakeMInst( X86::SETEm, FrameIndex, MI); break;