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CellSPU:

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- Fix call.ll and call_indirect.ll expected results, now that it's using a
  different pre-register allocation scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60741 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Scott Michel
2008-12-09 06:12:03 +00:00
parent e9f1015d1f
commit db1b5bf5eb
2 changed files with 2 additions and 2 deletions
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2
test/CodeGen/CellSPU/call.ll
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@@ -1,7 +1,7 @@
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
; RUN: grep brsl %t1.s | count 1 ; RUN: grep brsl %t1.s | count 1
; RUN: grep brasl %t1.s | count 1 ; RUN: grep brasl %t1.s | count 1
; RUN: grep stqd %t1.s | count 81 ; RUN: grep stqd %t1.s | count 80
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu" target triple = "spu"

2
test/CodeGen/CellSPU/call_indirect.ll
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@@ -10,7 +10,7 @@
; RUN: grep ilhu %t2.s | count 2 ; RUN: grep ilhu %t2.s | count 2
; RUN: grep iohl %t2.s | count 2 ; RUN: grep iohl %t2.s | count 2
; RUN: grep rotqby %t2.s | count 6 ; RUN: grep rotqby %t2.s | count 6
; RUN: grep lqd %t2.s | count 18 ; RUN: grep lqd %t2.s | count 13
; RUN: grep ilhu %t2.s | count 2 ; RUN: grep ilhu %t2.s | count 2
; RUN: grep ai %t2.s | count 9 ; RUN: grep ai %t2.s | count 9
; RUN: grep dispatch_tab %t2.s | count 6 ; RUN: grep dispatch_tab %t2.s | count 6