6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-30 04:56:49 +00:00
Code Issues Projects Releases Wiki Activity

Don't fold a load if the other operand is a TLS address.

Browse Source 
With this we generate

movl    %gs:0, %eax
leal    i@NTPOFF(%eax), %eax

instead of

movl    $i@NTPOFF, %eax
addl    %gs:0, %eax



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68778 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2009-04-10 10:09:34 +00:00
parent cb8c4778d3
commit dbcfb3080a
6 changed files with 49 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
lib/Target/X86/X86ISelDAGToDAG.cpp
View File

@ -322,6 +322,8 @@ bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
case ISD::AND:
case ISD::OR:
case ISD::XOR: {
SDValue Op1 = U->getOperand(1);
// If the other operand is a 8-bit immediate we should fold the immediate
// instead. This reduces code size.
// e.g.
@ -332,9 +334,25 @@ bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
// addl 4(%esp), %eax
// The former is 2 bytes shorter. In case where the increment is 1, then
// the saving can be 4 bytes (by using incl %eax).
if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1)))
if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(Op1))
if (Imm->getAPIntValue().isSignedIntN(8))
return false;
// If the other operand is a TLS address, we should fold it instead.
// This produces
// movl %gs:0, %eax
// leal i@NTPOFF(%eax), %eax
// instead of
// movl $i@NTPOFF, %eax
// addl %gs:0, %eax
// if the block also has an access to a second TLS address this will save
// a load.
// FIXME: This is probably also true for non TLS addresses.
if (Op1.getOpcode() == X86ISD::Wrapper) {
SDValue Val = Op1.getOperand(0);
if (Val.getOpcode() == ISD::TargetGlobalTLSAddress)
return false;
}
}
}
@ -1170,13 +1188,16 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDValue Op, SDValue N,
SDValue &Base, SDValue &Scale,
SDValue &Index, SDValue &Disp) {
X86ISelAddressMode AM;
// Set AM.Segment to prevent MatchAddress from using one. LEA doesn't support
// segments.
SDValue Copy = AM.Segment;
SDValue T = CurDAG->getRegister(0, MVT::i32);
AM.Segment = T;
if (MatchAddress(N, AM))
return false;
//Is it better to set AM.Segment before calling MatchAddress to
//prevent it from adding a segment?
if (AM.Segment.getNode())
return false;
assert (T == AM.Segment);
AM.Segment = Copy;
MVT VT = N.getValueType();
unsigned Complexity = 0;

4
test/CodeGen/X86/tls10.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl \$i@NTPOFF, %eax} %t
; RUN: grep {addl %gs:0, %eax} %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
@i = external hidden thread_local global i32

14
test/CodeGen/X86/tls15.ll Normal file
View File

@ -0,0 +1,14 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl %gs:0, %eax} %t | count 1
; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t
; RUN: grep {leal j@NTPOFF(%eax), %eax} %t
@i = thread_local global i32 0
@j = thread_local global i32 0
define void @f(i32** %a, i32** %b) {
entry:
store i32* @i, i32** %a, align 8
store i32* @j, i32** %b, align 8
ret void
}

4
test/CodeGen/X86/tls2.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl \$i@NTPOFF, %eax} %t
; RUN: grep {addl %gs:0, %eax} %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
@i = thread_local global i32 15

4
test/CodeGen/X86/tls6.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl \$i@NTPOFF, %eax} %t
; RUN: grep {addl %gs:0, %eax} %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
@i = internal thread_local global i32 15

4
test/CodeGen/X86/tls8.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
; RUN: grep {movl \$i@NTPOFF, %eax} %t
; RUN: grep {addl %gs:0, %eax} %t
; RUN: grep {movl %gs:0, %eax} %t
; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
@i = hidden thread_local global i32 15