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https://github.com/c64scene-ar/llvm-6502.git
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Don't fold a load if the other operand is a TLS address.
With this we generate movl %gs:0, %eax leal i@NTPOFF(%eax), %eax instead of movl $i@NTPOFF, %eax addl %gs:0, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68778 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -322,6 +322,8 @@ bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
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case ISD::AND:
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case ISD::AND:
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case ISD::OR:
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case ISD::OR:
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case ISD::XOR: {
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case ISD::XOR: {
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SDValue Op1 = U->getOperand(1);
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// If the other operand is a 8-bit immediate we should fold the immediate
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// If the other operand is a 8-bit immediate we should fold the immediate
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// instead. This reduces code size.
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// instead. This reduces code size.
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// e.g.
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// e.g.
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@ -332,9 +334,25 @@ bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
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// addl 4(%esp), %eax
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// addl 4(%esp), %eax
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// The former is 2 bytes shorter. In case where the increment is 1, then
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// The former is 2 bytes shorter. In case where the increment is 1, then
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// the saving can be 4 bytes (by using incl %eax).
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// the saving can be 4 bytes (by using incl %eax).
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if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1)))
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if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(Op1))
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if (Imm->getAPIntValue().isSignedIntN(8))
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if (Imm->getAPIntValue().isSignedIntN(8))
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return false;
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return false;
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// If the other operand is a TLS address, we should fold it instead.
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// This produces
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// movl %gs:0, %eax
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// leal i@NTPOFF(%eax), %eax
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// instead of
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// movl $i@NTPOFF, %eax
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// addl %gs:0, %eax
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// if the block also has an access to a second TLS address this will save
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// a load.
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// FIXME: This is probably also true for non TLS addresses.
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if (Op1.getOpcode() == X86ISD::Wrapper) {
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SDValue Val = Op1.getOperand(0);
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if (Val.getOpcode() == ISD::TargetGlobalTLSAddress)
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return false;
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}
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}
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}
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}
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}
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@ -1170,13 +1188,16 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDValue Op, SDValue N,
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SDValue &Base, SDValue &Scale,
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SDValue &Base, SDValue &Scale,
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SDValue &Index, SDValue &Disp) {
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SDValue &Index, SDValue &Disp) {
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X86ISelAddressMode AM;
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X86ISelAddressMode AM;
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// Set AM.Segment to prevent MatchAddress from using one. LEA doesn't support
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// segments.
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SDValue Copy = AM.Segment;
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SDValue T = CurDAG->getRegister(0, MVT::i32);
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AM.Segment = T;
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if (MatchAddress(N, AM))
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if (MatchAddress(N, AM))
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return false;
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return false;
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assert (T == AM.Segment);
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//Is it better to set AM.Segment before calling MatchAddress to
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AM.Segment = Copy;
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//prevent it from adding a segment?
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if (AM.Segment.getNode())
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return false;
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MVT VT = N.getValueType();
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MVT VT = N.getValueType();
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unsigned Complexity = 0;
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unsigned Complexity = 0;
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@ -1,6 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: grep {movl \$i@NTPOFF, %eax} %t
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; RUN: grep {movl %gs:0, %eax} %t
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; RUN: grep {addl %gs:0, %eax} %t
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; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
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@i = external hidden thread_local global i32
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@i = external hidden thread_local global i32
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14
test/CodeGen/X86/tls15.ll
Normal file
14
test/CodeGen/X86/tls15.ll
Normal file
@ -0,0 +1,14 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: grep {movl %gs:0, %eax} %t | count 1
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; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t
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; RUN: grep {leal j@NTPOFF(%eax), %eax} %t
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@i = thread_local global i32 0
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@j = thread_local global i32 0
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define void @f(i32** %a, i32** %b) {
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entry:
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store i32* @i, i32** %a, align 8
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store i32* @j, i32** %b, align 8
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ret void
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}
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@ -1,6 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: grep {movl \$i@NTPOFF, %eax} %t
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; RUN: grep {movl %gs:0, %eax} %t
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; RUN: grep {addl %gs:0, %eax} %t
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; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
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@i = thread_local global i32 15
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@i = thread_local global i32 15
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@ -1,6 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: grep {movl \$i@NTPOFF, %eax} %t
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; RUN: grep {movl %gs:0, %eax} %t
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; RUN: grep {addl %gs:0, %eax} %t
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; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
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@i = internal thread_local global i32 15
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@i = internal thread_local global i32 15
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@ -1,6 +1,6 @@
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: llvm-as < %s | llc -march=x86 -mtriple=i386-linux-gnu > %t
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; RUN: grep {movl \$i@NTPOFF, %eax} %t
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; RUN: grep {movl %gs:0, %eax} %t
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; RUN: grep {addl %gs:0, %eax} %t
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; RUN: grep {leal i@NTPOFF(%eax), %eax} %t
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@i = hidden thread_local global i32 15
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@i = hidden thread_local global i32 15
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