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Fixed bug when generating Load Upper Immediate microMIPS instruction.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190746 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zoran Jovanovic 2013-09-14 07:35:41 +00:00
parent ab48d10eff
commit dcc425c630
5 changed files with 11 additions and 2 deletions
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2
lib/Target/Mips/MipsInstrFormats.td
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@ -363,7 +363,7 @@ class CLO_FM<bits<6> funct> : StdArch {
let rt = rd;
}
class LUI_FM {
class LUI_FM : StdArch {
bits<5> rt;
bits<16> imm16;

2
lib/Target/Mips/MipsInstrInfo.td
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@ -447,7 +447,7 @@ class shift_rotate_reg<string opstr, RegisterOperand RO,
// Load Upper Imediate
class LoadUpper<string opstr, RegisterOperand RO, Operand Imm>:
InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
[], IIArith, FrmI>, IsAsCheapAsAMove {
[], IIArith, FrmI, opstr>, IsAsCheapAsAMove {
let neverHasSideEffects = 1;
let isReMaterializable = 1;
}

3
test/MC/Disassembler/Mips/micromips.txt
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@ -49,6 +49,9 @@
# CHECK: sltu $3, $3, $5
0x00 0xa3 0x1b 0x90
# CHECK: lui $9, 17767
0x41 0xa9 0x45 0x67
# CHECK: and $9, $6, $7
0x00 0xe6 0x4a 0x50

3
test/MC/Disassembler/Mips/micromips_le.txt
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@ -49,6 +49,9 @@
# CHECK: sltu $3, $3, $5
0xa3 0x00 0x90 0x1b
# CHECK: lui $9, 17767
0xa9 0x41 0x67 0x45
# CHECK: and $9, $6, $7
0xe6 0x00 0x50 0x4a

3
test/MC/Mips/micromips-alu-instructions.s
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@ -23,6 +23,7 @@
# CHECK-EL: slti $3, $3, 103 # encoding: [0x63,0x90,0x67,0x00]
# CHECK-EL: sltiu $3, $3, 103 # encoding: [0x63,0xb0,0x67,0x00]
# CHECK-EL: sltu $3, $3, $5 # encoding: [0xa3,0x00,0x90,0x1b]
# CHECK-EL: lui $9, 17767 # encoding: [0xa9,0x41,0x67,0x45]
# CHECK-EL: and $9, $6, $7 # encoding: [0xe6,0x00,0x50,0x4a]
# CHECK-EL: andi $9, $6, 17767 # encoding: [0x26,0xd1,0x67,0x45]
# CHECK-EL: andi $9, $6, 17767 # encoding: [0x26,0xd1,0x67,0x45]
@ -57,6 +58,7 @@
# CHECK-EB: slti $3, $3, 103 # encoding: [0x90,0x63,0x00,0x67]
# CHECK-EB: sltiu $3, $3, 103 # encoding: [0xb0,0x63,0x00,0x67]
# CHECK-EB: sltu $3, $3, $5 # encoding: [0x00,0xa3,0x1b,0x90]
# CHECK-EB: lui $9, 17767 # encoding: [0x41,0xa9,0x45,0x67]
# CHECK-EB: and $9, $6, $7 # encoding: [0x00,0xe6,0x4a,0x50]
# CHECK-EB: andi $9, $6, 17767 # encoding: [0xd1,0x26,0x45,0x67]
# CHECK-EB: andi $9, $6, 17767 # encoding: [0xd1,0x26,0x45,0x67]
@ -88,6 +90,7 @@
slti $3, $3, 103
sltiu $3, $3, 103
sltu $3, $3, $5
lui $9, 17767
and $9, $6, $7
and $9, $6, 17767
andi $9, $6, 17767