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Convert more tests over to the new atomic instructions.

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I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140566 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-09-26 21:30:17 +00:00
parent a69d998664
commit de412c391b
6 changed files with 1357 additions and 1494 deletions
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4
test/CodeGen/Alpha/mb.ll
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@ -1,8 +1,6 @@
; RUN: llc < %s -march=alpha | grep mb
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
define void @test() {
call void @llvm.memory.barrier( i1 true, i1 true, i1 true, i1 true , i1 true)
fence seq_cst
ret void
}

8
test/CodeGen/Alpha/wmb.ll
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@ -1,8 +0,0 @@
; RUN: llc < %s -march=alpha | grep wmb
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1)
define void @test() {
call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true , i1 true)
ret void
}

1392
test/CodeGen/PowerPC/Atomics-32.ll
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File diff suppressed because it is too large Load Diff

1423
test/CodeGen/PowerPC/Atomics-64.ll
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File diff suppressed because it is too large Load Diff

12
test/CodeGen/PowerPC/atomic-1.ll
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@ -3,7 +3,7 @@
define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
; CHECK: exchange_and_add:
; CHECK: lwarx
%tmp = call i32 @llvm.atomic.load.add.i32.p0i32(i32* %mem, i32 %val)
%tmp = atomicrmw add i32* %mem, i32 %val monotonic
; CHECK: stwcx.
ret i32 %tmp
}
@ -11,7 +11,7 @@ define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
define i32 @exchange_and_cmp(i32* %mem) nounwind {
; CHECK: exchange_and_cmp:
; CHECK: lwarx
%tmp = call i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* %mem, i32 0, i32 1)
%tmp = cmpxchg i32* %mem, i32 0, i32 1 monotonic
; CHECK: stwcx.
; CHECK: stwcx.
ret i32 %tmp
@ -20,13 +20,7 @@ define i32 @exchange_and_cmp(i32* %mem) nounwind {
define i32 @exchange(i32* %mem, i32 %val) nounwind {
; CHECK: exchange:
; CHECK: lwarx
%tmp = call i32 @llvm.atomic.swap.i32.p0i32(i32* %mem, i32 1)
%tmp = atomicrmw xchg i32* %mem, i32 1 monotonic
; CHECK: stwcx.
ret i32 %tmp
}
declare i32 @llvm.atomic.load.add.i32.p0i32(i32* nocapture, i32) nounwind
declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32* nocapture, i32, i32) nounwind
declare i32 @llvm.atomic.swap.i32.p0i32(i32* nocapture, i32) nounwind

12
test/CodeGen/PowerPC/atomic-2.ll
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@ -3,7 +3,7 @@
define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
; CHECK: exchange_and_add:
; CHECK: ldarx
%tmp = call i64 @llvm.atomic.load.add.i64.p0i64(i64* %mem, i64 %val)
%tmp = atomicrmw add i64* %mem, i64 %val monotonic
; CHECK: stdcx.
ret i64 %tmp
}
@ -11,7 +11,7 @@ define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
define i64 @exchange_and_cmp(i64* %mem) nounwind {
; CHECK: exchange_and_cmp:
; CHECK: ldarx
%tmp = call i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* %mem, i64 0, i64 1)
%tmp = cmpxchg i64* %mem, i64 0, i64 1 monotonic
; CHECK: stdcx.
; CHECK: stdcx.
ret i64 %tmp
@ -20,13 +20,7 @@ define i64 @exchange_and_cmp(i64* %mem) nounwind {
define i64 @exchange(i64* %mem, i64 %val) nounwind {
; CHECK: exchange:
; CHECK: ldarx
%tmp = call i64 @llvm.atomic.swap.i64.p0i64(i64* %mem, i64 1)
%tmp = atomicrmw xchg i64* %mem, i64 1 monotonic
; CHECK: stdcx.
ret i64 %tmp
}
declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind
declare i64 @llvm.atomic.cmp.swap.i64.p0i64(i64* nocapture, i64, i64) nounwind
declare i64 @llvm.atomic.swap.i64.p0i64(i64* nocapture, i64) nounwind